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Remove FrameAccess struct from hasLoadFromStackSlot

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This removes the FrameAccess struct that was added to the interface
in D51537, since the PseudoValue from the MachineMemoryOperand
can be safely casted to a FixedStackPseudoSourceValue.

Reviewers: MatzeB, thegameg, javed.absar

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D51617

llvm-svn: 341454
This commit is contained in:
Sander de Smalen 2018-09-05 08:59:50 +00:00
parent 05508f6a1d
commit 3be19719e3
10 changed files with 64 additions and 61 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
include/llvm/CodeGen/TargetInstrInfo.h
View File

@ -79,13 +79,6 @@ public:
return Opc <= TargetOpcode::GENERIC_OP_END;
}
// Simple struct describing access to a FrameIndex.
struct FrameAccess {
const MachineMemOperand *MMO;
int FI;
FrameAccess(const MachineMemOperand *MMO, int FI) : MMO(MMO), FI(FI) {}
};
/// Given a machine instruction descriptor, returns the register
/// class constraint for OpNum, or NULL.
const TargetRegisterClass *getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
@ -258,8 +251,9 @@ public:
/// If not, return false. Unlike isLoadFromStackSlot, this returns true for
/// any instructions that loads from the stack. This is just a hint, as some
/// cases may be missed.
virtual bool hasLoadFromStackSlot(const MachineInstr &MI,
SmallVectorImpl<FrameAccess> &Accesses) const;
virtual bool hasLoadFromStackSlot(
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
/// If the specified machine instruction is a direct
/// store to a stack slot, return the virtual or physical register number of
@ -295,8 +289,9 @@ public:
/// If not, return false. Unlike isStoreToStackSlot,
/// this returns true for any instructions that stores to the
/// stack. This is just a hint, as some cases may be missed.
virtual bool hasStoreToStackSlot(const MachineInstr &MI,
SmallVectorImpl<FrameAccess> &Accesses) const;
virtual bool hasStoreToStackSlot(
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
/// Return true if the specified machine instruction
/// is a copy of one stack slot to another and has no other effect.

14
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
View File

@ -750,19 +750,21 @@ static bool emitComments(const MachineInstr &MI, raw_ostream &CommentOS,
const MachineFrameInfo &MFI = MF->getFrameInfo();
bool Commented = false;
auto getSize = [&MFI](
const SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) {
auto getSize =
[&MFI](const SmallVectorImpl<const MachineMemOperand *> &Accesses) {
unsigned Size = 0;
for (auto &A : Accesses)
if (MFI.isSpillSlotObjectIndex(A.FI))
Size += A.MMO->getSize();
for (auto A : Accesses)
if (MFI.isSpillSlotObjectIndex(
cast<FixedStackPseudoSourceValue>(A->getPseudoValue())
->getFrameIndex()))
Size += A->getSize();
return Size;
};
// We assume a single instruction only has a spill or reload, not
// both.
const MachineMemOperand *MMO;
SmallVector<TargetInstrInfo::FrameAccess, 2> Accesses;
SmallVector<const MachineMemOperand *, 2> Accesses;
if (TII->isLoadFromStackSlotPostFE(MI, FI)) {
if (MFI.isSpillSlotObjectIndex(FI)) {
MMO = *MI.memoperands_begin();

8
lib/CodeGen/LiveDebugValues.cpp
View File

@ -470,7 +470,7 @@ bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
MachineFunction *MF, unsigned &Reg) {
const MachineFrameInfo &FrameInfo = MF->getFrameInfo();
int FI;
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand*, 1> Accesses;
// TODO: Handle multiple stores folded into one.
if (!MI.hasOneMemOperand())
@ -480,8 +480,10 @@ bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
if (!((TII->isStoreToStackSlotPostFE(MI, FI) &&
FrameInfo.isSpillSlotObjectIndex(FI)) ||
(TII->hasStoreToStackSlot(MI, Accesses) &&
llvm::any_of(Accesses, [&FrameInfo](TargetInstrInfo::FrameAccess &FA) {
return FrameInfo.isSpillSlotObjectIndex(FA.FI);
llvm::any_of(Accesses, [&FrameInfo](const MachineMemOperand *MMO) {
return FrameInfo.isSpillSlotObjectIndex(
cast<FixedStackPseudoSourceValue>(MMO->getPseudoValue())
->getFrameIndex());
}))))
return false;

17
lib/CodeGen/RegAllocGreedy.cpp
View File

@ -3120,24 +3120,23 @@ void RAGreedy::reportNumberOfSplillsReloads(MachineLoop *L, unsigned &Reloads,
// Handle blocks that were not included in subloops.
if (Loops->getLoopFor(MBB) == L)
for (MachineInstr &MI : *MBB) {
SmallVector<TargetInstrInfo::FrameAccess, 2> Accesses;
SmallVector<const MachineMemOperand *, 2> Accesses;
auto isSpillSlotAccess = [&MFI](const MachineMemOperand *A) {
return MFI.isSpillSlotObjectIndex(
cast<FixedStackPseudoSourceValue>(A->getPseudoValue())
->getFrameIndex());
};
if (TII->isLoadFromStackSlot(MI, FI) && MFI.isSpillSlotObjectIndex(FI))
++Reloads;
else if (TII->hasLoadFromStackSlot(MI, Accesses) &&
llvm::any_of(Accesses,
[&MFI](const TargetInstrInfo::FrameAccess &A) {
return MFI.isSpillSlotObjectIndex(A.FI);
}))
llvm::any_of(Accesses, isSpillSlotAccess))
++FoldedReloads;
else if (TII->isStoreToStackSlot(MI, FI) &&
MFI.isSpillSlotObjectIndex(FI))
++Spills;
else if (TII->hasStoreToStackSlot(MI, Accesses) &&
llvm::any_of(Accesses,
[&MFI](const TargetInstrInfo::FrameAccess &A) {
return MFI.isSpillSlotObjectIndex(A.FI);
}))
llvm::any_of(Accesses, isSpillSlotAccess))
++FoldedSpills;
}

25
lib/CodeGen/TargetInstrInfo.cpp
View File

@ -340,34 +340,29 @@ bool TargetInstrInfo::PredicateInstruction(
}
bool TargetInstrInfo::hasLoadFromStackSlot(
const MachineInstr &MI, SmallVectorImpl<FrameAccess> &Accesses) const {
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
size_t StartSize = Accesses.size();
for (MachineInstr::mmo_iterator o = MI.memoperands_begin(),
oe = MI.memoperands_end();
o != oe; ++o) {
if ((*o)->isLoad()) {
if (const FixedStackPseudoSourceValue *Value =
dyn_cast_or_null<FixedStackPseudoSourceValue>(
(*o)->getPseudoValue()))
Accesses.emplace_back(*o, Value->getFrameIndex());
}
if ((*o)->isLoad() &&
dyn_cast_or_null<FixedStackPseudoSourceValue>((*o)->getPseudoValue()))
Accesses.push_back(*o);
}
return Accesses.size() != StartSize;
}
bool TargetInstrInfo::hasStoreToStackSlot(
const MachineInstr &MI, SmallVectorImpl<FrameAccess> &Accesses) const {
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
size_t StartSize = Accesses.size();
for (MachineInstr::mmo_iterator o = MI.memoperands_begin(),
oe = MI.memoperands_end();
o != oe; ++o) {
if ((*o)->isStore()) {
if (const FixedStackPseudoSourceValue *Value =
dyn_cast_or_null<FixedStackPseudoSourceValue>(
(*o)->getPseudoValue()))
Accesses.emplace_back(*o, Value->getFrameIndex());
}
if ((*o)->isStore() &&
dyn_cast_or_null<FixedStackPseudoSourceValue>((*o)->getPseudoValue()))
Accesses.push_back(*o);
}
return Accesses.size() != StartSize;
}

12
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -1172,9 +1172,11 @@ unsigned ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand *, 1> Accesses;
if (MI.mayStore() && hasStoreToStackSlot(MI, Accesses)) {
FrameIndex = Accesses.begin()->FI;
FrameIndex =
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
->getFrameIndex();
return true;
}
return false;
@ -1390,9 +1392,11 @@ unsigned ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
unsigned ARMBaseInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand *, 1> Accesses;
if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses)) {
FrameIndex = Accesses.begin()->FI;
FrameIndex =
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
->getFrameIndex();
return true;
}
return false;

4
lib/Target/Hexagon/HexagonInstrInfo.cpp
View File

@ -337,7 +337,7 @@ unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
/// operand of that instruction if true.
bool HexagonInstrInfo::hasLoadFromStackSlot(
const MachineInstr &MI,
SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
if (MI.isBundle()) {
const MachineBasicBlock *MBB = MI.getParent();
MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
@ -355,7 +355,7 @@ bool HexagonInstrInfo::hasLoadFromStackSlot(
/// operand of that instruction if true.
bool HexagonInstrInfo::hasStoreToStackSlot(
const MachineInstr &MI,
SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const {
SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
if (MI.isBundle()) {
const MachineBasicBlock *MBB = MI.getParent();
MachineBasicBlock::const_instr_iterator MII = MI.getIterator();

4
lib/Target/Hexagon/HexagonInstrInfo.h
View File

@ -71,14 +71,14 @@ public:
/// if true.
bool hasLoadFromStackSlot(
const MachineInstr &MI,
SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
/// Check if the instruction or the bundle of instructions has
/// store to stack slots. Return the frameindex and machine memory operand
/// if true.
bool hasStoreToStackSlot(
const MachineInstr &MI,
SmallVectorImpl<TargetInstrInfo::FrameAccess> &Accesses) const override;
SmallVectorImpl<const MachineMemOperand *> &Accesses) const override;
/// Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't

6
lib/Target/Lanai/LanaiInstrInfo.cpp
View File

@ -733,9 +733,11 @@ unsigned LanaiInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasLoadFromStackSlot(MI, Accesses)){
FrameIndex = Accesses.begin()->FI;
FrameIndex =
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
->getFrameIndex();
return 1;
}
}

12
lib/Target/X86/X86InstrInfo.cpp
View File

@ -411,9 +411,11 @@ unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,
if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasLoadFromStackSlot(MI, Accesses)) {
FrameIndex = Accesses.begin()->FI;
FrameIndex =
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
->getFrameIndex();
return 1;
}
}
@ -444,9 +446,11 @@ unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,
if ((Reg = isStoreToStackSlot(MI, FrameIndex)))
return Reg;
// Check for post-frame index elimination operations
SmallVector<TargetInstrInfo::FrameAccess, 1> Accesses;
SmallVector<const MachineMemOperand *, 1> Accesses;
if (hasStoreToStackSlot(MI, Accesses)) {
FrameIndex = Accesses.begin()->FI;
FrameIndex =
cast<FixedStackPseudoSourceValue>(Accesses.front()->getPseudoValue())
->getFrameIndex();
return 1;
}
}