mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 11:42:57 +01:00
[AVX512] Introduce fma3p_forms from AVX
This multiclass generates the different forms: 213, 231, 132 in AVX. 132 in AVX512 is a separate class but I am planning to use this same multiclass to generate 231 relying on the nice the null_frag trick from AVX to disable codegen pattern for 231. No functionality change, no change in X86.td.expanded except for the different instruction definition names. llvm-svn: 220539
This commit is contained in:
parent
ed260eaa59
commit
3beded2b5d
@ -3330,9 +3330,11 @@ let Predicates = [HasAVX512] in {
|
|||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// FMA - Fused Multiply Operations
|
// FMA - Fused Multiply Operations
|
||||||
//
|
//
|
||||||
|
|
||||||
let Constraints = "$src1 = $dst" in {
|
let Constraints = "$src1 = $dst" in {
|
||||||
multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
|
// Omitting the parameter OpNode (= null_frag) disables ISel pattern matching.
|
||||||
X86VectorVTInfo _> {
|
multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
|
||||||
|
SDPatternOperator OpNode = null_frag> {
|
||||||
defm r: AVX512_maskable_3src<opc, MRMSrcReg, _, (outs _.RC:$dst),
|
defm r: AVX512_maskable_3src<opc, MRMSrcReg, _, (outs _.RC:$dst),
|
||||||
(ins _.RC:$src2, _.RC:$src3),
|
(ins _.RC:$src2, _.RC:$src3),
|
||||||
OpcodeStr, "$src3, $src2", "$src2, $src3",
|
OpcodeStr, "$src3, $src2", "$src2, $src3",
|
||||||
@ -3354,45 +3356,41 @@ multiclass avx512_fma3p_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
|
|||||||
}
|
}
|
||||||
} // Constraints = "$src1 = $dst"
|
} // Constraints = "$src1 = $dst"
|
||||||
|
|
||||||
|
multiclass avx512_fma3p_forms<bits<8> opc213,
|
||||||
|
string OpcodeStr, X86VectorVTInfo VTI,
|
||||||
|
SDPatternOperator OpNode> {
|
||||||
|
defm v213 : avx512_fma3p_rm<opc213, !strconcat(OpcodeStr, "213", VTI.Suffix),
|
||||||
|
VTI, OpNode>,
|
||||||
|
EVEX_V512, EVEX_CD8<VTI.EltSize, CD8VF>;
|
||||||
|
}
|
||||||
|
|
||||||
let ExeDomain = SSEPackedSingle in {
|
let ExeDomain = SSEPackedSingle in {
|
||||||
defm VFMADD213PSZ : avx512_fma3p_rm<0xA8, "vfmadd213ps", X86Fmadd,
|
defm VFMADDPSZ : avx512_fma3p_forms<0xA8, "vfmadd",
|
||||||
v16f32_info>,
|
v16f32_info, X86Fmadd>;
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
defm VFMSUBPSZ : avx512_fma3p_forms<0xAA, "vfmsub",
|
||||||
defm VFMSUB213PSZ : avx512_fma3p_rm<0xAA, "vfmsub213ps", X86Fmsub,
|
v16f32_info, X86Fmsub>;
|
||||||
v16f32_info>,
|
defm VFMADDSUBPSZ : avx512_fma3p_forms<0xA6, "vfmaddsub",
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
v16f32_info, X86Fmaddsub>;
|
||||||
defm VFMADDSUB213PSZ : avx512_fma3p_rm<0xA6, "vfmaddsub213ps", X86Fmaddsub,
|
defm VFMSUBADDPSZ : avx512_fma3p_forms<0xA7, "vfmsubadd",
|
||||||
v16f32_info>,
|
v16f32_info, X86Fmsubadd>;
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
defm VFNMADDPSZ : avx512_fma3p_forms<0xAC, "vfnmadd",
|
||||||
defm VFMSUBADD213PSZ : avx512_fma3p_rm<0xA7, "vfmsubadd213ps", X86Fmsubadd,
|
v16f32_info, X86Fnmadd>;
|
||||||
v16f32_info>,
|
defm VFNMSUBPSZ : avx512_fma3p_forms<0xAE, "vfnmsub",
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
v16f32_info, X86Fnmsub>;
|
||||||
defm VFNMADD213PSZ : avx512_fma3p_rm<0xAC, "vfnmadd213ps", X86Fnmadd,
|
|
||||||
v16f32_info>,
|
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
|
||||||
defm VFNMSUB213PSZ : avx512_fma3p_rm<0xAE, "vfnmsub213ps", X86Fnmsub,
|
|
||||||
v16f32_info>,
|
|
||||||
EVEX_V512, EVEX_CD8<32, CD8VF>;
|
|
||||||
}
|
}
|
||||||
let ExeDomain = SSEPackedDouble in {
|
let ExeDomain = SSEPackedDouble in {
|
||||||
defm VFMADD213PDZ : avx512_fma3p_rm<0xA8, "vfmadd213pd", X86Fmadd,
|
defm VFMADDPDZ : avx512_fma3p_forms<0xA8, "vfmadd",
|
||||||
v8f64_info>,
|
v8f64_info, X86Fmadd>, VEX_W;
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
defm VFMSUBPDZ : avx512_fma3p_forms<0xAA, "vfmsub",
|
||||||
defm VFMSUB213PDZ : avx512_fma3p_rm<0xAA, "vfmsub213pd", X86Fmsub,
|
v8f64_info, X86Fmsub>, VEX_W;
|
||||||
v8f64_info>,
|
defm VFMADDSUBPDZ : avx512_fma3p_forms<0xA6, "vfmaddsub",
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
v8f64_info, X86Fmaddsub>, VEX_W;
|
||||||
defm VFMADDSUB213PDZ : avx512_fma3p_rm<0xA6, "vfmaddsub213pd", X86Fmaddsub,
|
defm VFMSUBADDPDZ : avx512_fma3p_forms<0xA7, "vfmsubadd",
|
||||||
v8f64_info>,
|
v8f64_info, X86Fmsubadd>, VEX_W;
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
defm VFNMADDPDZ : avx512_fma3p_forms<0xAC, "vfnmadd",
|
||||||
defm VFMSUBADD213PDZ : avx512_fma3p_rm<0xA7, "vfmsubadd213pd", X86Fmsubadd,
|
v8f64_info, X86Fnmadd>, VEX_W;
|
||||||
v8f64_info>,
|
defm VFNMSUBPDZ : avx512_fma3p_forms<0xAE, "vfnmsub",
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
v8f64_info, X86Fnmsub>, VEX_W;
|
||||||
defm VFNMADD213PDZ : avx512_fma3p_rm<0xAC, "vfnmadd213pd", X86Fnmadd,
|
|
||||||
v8f64_info>,
|
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
|
||||||
defm VFNMSUB213PDZ : avx512_fma3p_rm<0xAE, "vfnmsub213pd", X86Fnmsub,
|
|
||||||
v8f64_info>,
|
|
||||||
EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
let Constraints = "$src1 = $dst" in {
|
let Constraints = "$src1 = $dst" in {
|
||||||
|
Loading…
Reference in New Issue
Block a user