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AMDGPU: Materialize frame index before add
It isn't generally safe to fold the frame index directly into the operand since it will possibly not be an inline immediate after it is expanded. This surprisingly seems to produce better code, since the FI doesn't prevent folding other immediate operands. llvm-svn: 288185
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@ -245,12 +245,17 @@ void SIRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB,
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unsigned UnusedCarry = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);
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unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
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unsigned FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
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BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
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.addImm(Offset);
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BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg)
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.addFrameIndex(FrameIdx);
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BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_ADD_I32_e64), BaseReg)
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.addReg(UnusedCarry, RegState::Define | RegState::Dead)
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.addReg(OffsetReg, RegState::Kill)
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.addFrameIndex(FrameIdx);
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.addReg(FIReg);
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}
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void SIRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
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@ -7,15 +7,16 @@
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;
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; CHECK-LABEL: {{^}}main:
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; CHECK: v_mov_b32_e32 [[BASE_FI:v[0-9]+]], 0{{$}}
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; FIXME: add 0?
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; CHECK-DAG: s_movk_i32 [[K0:s[0-9]+]], 0x140
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; CHECK-DAG: v_add_i32_e64 [[ADD_K0:v[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, [[K0]], 0
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; CHECK-DAG: v_add_i32_e32 [[ADD_K0:v[0-9]+]], vcc, 0x140, [[BASE_FI]]
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; CHECK-DAG: v_lshlrev_b32_e32 [[BYTES:v[0-9]+]], 2, v0
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; CHECK-DAG: buffer_store_dword {{v[0-9]+}}, [[ADD_K0]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen{{$}}
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; CHECK-DAG: v_add_i32_e32 [[HI_OFF:v[0-9]+]], vcc, 0x200, [[BYTES]]
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; CHECK-DAG: v_add_i32_e32 [[LO_OFF:v[0-9]+]], vcc, 0, [[BYTES]]
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; CHECK-DAG: v_add_i32_e32 [[LO_OFF:v[0-9]+]], vcc, [[BASE_FI]], [[BYTES]]
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; CHECK: buffer_load_dword {{v[0-9]+}}, [[LO_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen
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; CHECK: buffer_load_dword {{v[0-9]+}}, [[HI_OFF]], {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}} offen
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