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[X86][SSE] Add support for combining target shuffles to binary BLEND
We already had support for 1-input BLEND with zero - this adds support for 2-input BLEND as well. llvm-svn: 283040
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@ -25160,7 +25160,7 @@ static bool matchBinaryPermuteVectorShuffle(MVT MaskVT, ArrayRef<int> Mask,
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}
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}
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}
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}
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// Attempt to blend with zero.
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// Attempt to combine to X86ISD::BLENDI.
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if (NumMaskElts <= 8 && ((Subtarget.hasSSE41() && MaskVT.is128BitVector()) ||
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if (NumMaskElts <= 8 && ((Subtarget.hasSSE41() && MaskVT.is128BitVector()) ||
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(Subtarget.hasAVX() && MaskVT.is256BitVector()))) {
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(Subtarget.hasAVX() && MaskVT.is256BitVector()))) {
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// Determine a type compatible with X86ISD::BLENDI.
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// Determine a type compatible with X86ISD::BLENDI.
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@ -25180,12 +25180,13 @@ static bool matchBinaryPermuteVectorShuffle(MVT MaskVT, ArrayRef<int> Mask,
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BlendVT = MVT::v8f32;
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BlendVT = MVT::v8f32;
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}
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}
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unsigned BlendSize = BlendVT.getVectorNumElements();
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unsigned MaskRatio = BlendSize / NumMaskElts;
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// Can we blend with zero?
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if (isSequentialOrUndefOrZeroInRange(Mask, /*Pos*/ 0, /*Size*/ NumMaskElts,
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if (isSequentialOrUndefOrZeroInRange(Mask, /*Pos*/ 0, /*Size*/ NumMaskElts,
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/*Low*/ 0) &&
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/*Low*/ 0) &&
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NumMaskElts <= BlendVT.getVectorNumElements()) {
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NumMaskElts <= BlendVT.getVectorNumElements()) {
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unsigned BlendSize = BlendVT.getVectorNumElements();
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unsigned MaskRatio = BlendSize / NumMaskElts;
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PermuteImm = 0;
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PermuteImm = 0;
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for (unsigned i = 0; i != BlendSize; ++i)
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for (unsigned i = 0; i != BlendSize; ++i)
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if (Mask[i / MaskRatio] < 0)
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if (Mask[i / MaskRatio] < 0)
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@ -25196,6 +25197,31 @@ static bool matchBinaryPermuteVectorShuffle(MVT MaskVT, ArrayRef<int> Mask,
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ShuffleVT = BlendVT;
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ShuffleVT = BlendVT;
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return true;
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return true;
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}
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}
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// Attempt to match as a binary blend.
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if (NumMaskElts <= BlendVT.getVectorNumElements()) {
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bool MatchBlend = true;
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for (int i = 0; i != NumMaskElts; ++i) {
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int M = Mask[i];
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if (M == SM_SentinelUndef)
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continue;
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else if (M == SM_SentinelZero)
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MatchBlend = false;
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else if ((M != i) && (M != (i + NumMaskElts)))
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MatchBlend = false;
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}
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if (MatchBlend) {
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PermuteImm = 0;
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for (unsigned i = 0; i != BlendSize; ++i)
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if ((int)NumMaskElts <= Mask[i / MaskRatio])
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PermuteImm |= 1u << i;
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Shuffle = X86ISD::BLENDI;
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ShuffleVT = BlendVT;
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return true;
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}
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}
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}
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}
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// Attempt to combine to INSERTPS.
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// Attempt to combine to INSERTPS.
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@ -851,13 +851,11 @@ define <16 x i16> @shuffle_v16i16_16_16_16_16_04_05_06_07_24_24_24_24_12_13_14_1
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; AVX1-LABEL: shuffle_v16i16_16_16_16_16_04_05_06_07_24_24_24_24_12_13_14_15:
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; AVX1-LABEL: shuffle_v16i16_16_16_16_16_04_05_06_07_24_24_24_24_12_13_14_15:
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; AVX1: # BB#0:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
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; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: retq
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; AVX1-NEXT: retq
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;
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;
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@ -1157,15 +1157,13 @@ define <32 x i8> @shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_
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; AVX1-LABEL: shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_48_48_48_48_48_48_48_48_24_25_26_27_28_29_30_31:
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; AVX1-LABEL: shuffle_v32i8_32_32_32_32_32_32_32_32_08_09_10_11_12_13_14_15_48_48_48_48_48_48_48_48_24_25_26_27_28_29_30_31:
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; AVX1: # BB#0:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
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; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
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; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
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; AVX1-NEXT: retq
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; AVX1-NEXT: retq
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;
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;
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