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[RegBankSelect] Specify different optimization mode for the pass.
The mode should be choose by the target when instantiating the pass. llvm-svn: 270235
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@ -80,6 +80,16 @@ class RegBankSelect : public MachineFunctionPass {
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public:
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static char ID;
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/// List of the modes supported by the RegBankSelect pass.
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enum Mode {
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/// Assign the register banks as fast as possible (default).
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Fast,
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/// Greedily minimize the cost of assigning register banks.
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/// This should produce code of greater quality, but will
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/// require more compile time.
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Greedy
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};
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/// Abstract class used to represent an insertion point in a CFG.
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/// This class records an insertion point and materializes it on
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/// demand.
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@ -453,6 +463,9 @@ private:
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/// Helper class used for every code morphing.
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MachineIRBuilder MIRBuilder;
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/// Optimization mode of the pass.
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Mode OptMode;
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/// Assign the register bank of each operand of \p MI.
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void assignInstr(MachineInstr &MI);
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@ -535,8 +548,8 @@ private:
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SmallVectorImpl<RepairingPlacement> &RepairPts);
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public:
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// Ctor, nothing fancy.
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RegBankSelect();
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/// Create a RegBankSelect pass with the specified \p RunningMode.
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RegBankSelect(Mode RunningMode = Fast);
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const char *getPassName() const override {
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return "RegBankSelect";
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@ -29,8 +29,9 @@ INITIALIZE_PASS(RegBankSelect, "regbankselect",
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"Assign register bank of generic virtual registers",
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false, false);
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RegBankSelect::RegBankSelect()
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: MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr) {
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RegBankSelect::RegBankSelect(Mode RunningMode)
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: MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr),
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OptMode(RunningMode) {
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initializeRegBankSelectPass(*PassRegistry::getPassRegistry());
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}
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@ -39,6 +40,7 @@ void RegBankSelect::init(MachineFunction &MF) {
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assert(RBI && "Cannot work without RegisterBankInfo");
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MRI = &MF.getRegInfo();
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TRI = MF.getSubtarget().getRegisterInfo();
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assert(OptMode == Mode::Fast && "Non-fast mode not implemented");
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MIRBuilder.setMF(MF);
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}
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