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Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo
and make the actual map private. llvm-svn: 126376
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@ -105,9 +105,6 @@ public:
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APInt KnownOne, KnownZero;
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LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
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};
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/// LiveOutRegInfo - Information about live out vregs.
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IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
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/// PHINodesToUpdate - A list of phi instructions whose operand list will
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/// be updated after processing the current basic block.
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@ -143,12 +140,38 @@ public:
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return R = CreateRegs(V->getType());
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}
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/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
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/// register is a PHI destination and the PHI's LiveOutInfo is not valid.
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const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
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if (!LiveOutRegInfo.inBounds(Reg))
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return NULL;
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return &LiveOutRegInfo[Reg];
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}
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/// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
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void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
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const APInt &KnownZero, const APInt &KnownOne) {
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// Only install this information if it tells us something.
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if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
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return;
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LiveOutRegInfo.grow(Reg);
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LiveOutInfo &LOI = LiveOutRegInfo[Reg];
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LOI.NumSignBits = NumSignBits;
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LOI.KnownOne = KnownOne;
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LOI.KnownZero = KnownZero;
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}
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/// setByValArgumentFrameIndex - Record frame index for the byval
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/// argument.
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void setByValArgumentFrameIndex(const Argument *A, int FI);
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/// getByValArgumentFrameIndex - Get frame index for the byval argument.
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int getByValArgumentFrameIndex(const Argument *A);
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private:
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/// LiveOutRegInfo - Information about live out vregs.
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IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
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};
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/// AddCatchInfo - Extract the personality and type infos from an eh.selector
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@ -641,16 +641,17 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
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// If the source register was virtual and if we know something about it,
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// add an assert node.
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if (!TargetRegisterInfo::isVirtualRegister(Regs[Part+i]) ||
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!RegisterVT.isInteger() || RegisterVT.isVector() ||
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!FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i]))
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!RegisterVT.isInteger() || RegisterVT.isVector())
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continue;
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const FunctionLoweringInfo::LiveOutInfo *LOI =
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FuncInfo.GetLiveOutRegInfo(Regs[Part+i]);
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if (!LOI)
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continue;
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const FunctionLoweringInfo::LiveOutInfo &LOI =
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FuncInfo.LiveOutRegInfo[Regs[Part+i]];
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unsigned RegSize = RegisterVT.getSizeInBits();
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unsigned NumSignBits = LOI.NumSignBits;
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unsigned NumZeroBits = LOI.KnownZero.countLeadingOnes();
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unsigned NumSignBits = LOI->NumSignBits;
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unsigned NumZeroBits = LOI->KnownZero.countLeadingOnes();
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// FIXME: We capture more information than the dag can represent. For
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// now, just use the tightest assertzext/assertsext possible.
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@ -480,16 +480,7 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
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unsigned NumSignBits = CurDAG->ComputeNumSignBits(Src);
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Mask = APInt::getAllOnesValue(SrcVT.getSizeInBits());
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CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne);
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// Only install this information if it tells us something.
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if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) {
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FuncInfo->LiveOutRegInfo.grow(DestReg);
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FunctionLoweringInfo::LiveOutInfo &LOI =
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FuncInfo->LiveOutRegInfo[DestReg];
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LOI.NumSignBits = NumSignBits;
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LOI.KnownOne = KnownOne;
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LOI.KnownZero = KnownZero;
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}
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FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne);
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} while (!Worklist.empty());
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}
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