RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity

[AMDGPU] enable few disassembler tests that were mistakenly marked as FIXME.

Browse Source 
llvm-svn: 265028
This commit is contained in:
Valery Pykhtin 2016-03-31 17:28:46 +00:00
parent f9dc47bffa
commit 3d3e029ba9
1 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
test/MC/Disassembler/AMDGPU/vop2_vi.txt
View File

@ -138,14 +138,14 @@
# VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38] # VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38]
0x02 0x07 0x02 0x38 0x02 0x07 0x02 0x38
# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01] # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01]
#0x01 0x00 0x1c 0xd1 0x02 0x07 0xaa 0x01 0x01 0x00 0x1c 0xd1 0x02 0x07 0xaa 0x01
# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00] # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00]
#0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00 0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00] # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00]
#0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00 0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03] # FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03]
#0x01 0x00 0x1c 0xd1 0x02 0x07 0x06 0x03 #0x01 0x00 0x1c 0xd1 0x02 0x07 0x06 0x03
@ -153,8 +153,8 @@
# FIXME: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03] # FIXME: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03]
#0x01 0x6a 0x1c 0xd1 0x02 0x07 0x06 0x03 #0x01 0x6a 0x1c 0xd1 0x02 0x07 0x06 0x03
# FIXME: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01] # VI: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01]
#0x01 0x6a 0x1c 0xd1 0x02 0x07 0xaa 0x01 0x01 0x6a 0x1c 0xd1 0x02 0x07 0xaa 0x01
# VI: v_subb_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3a] # VI: v_subb_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3a]
0x02 0x07 0x02 0x3a 0x02 0x07 0x02 0x3a