mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
[InstCombine] regenerate test CHECKs; NFC
There's a discussion about changing a shufflevector transform in: https://bugs.llvm.org/show_bug.cgi?id=43958 It would protect against our current undef/poison behavior, and these are all tests that could be affected.
This commit is contained in:
Sanjay Patel
parent
5fe79eb481
commit
3d7a4708cc
@ -6,7 +6,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
|
||||
define <8 x i32> @identity_test_vpermd(<8 x i32> %a0) {
|
||||
; CHECK-LABEL: @identity_test_vpermd(
|
||||
; CHECK-NEXT: ret <8 x i32> %a0
|
||||
; CHECK-NEXT: ret <8 x i32> [[A0:%.*]]
|
||||
;
|
||||
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
|
||||
ret <8 x i32> %a
|
||||
@ -14,7 +14,7 @@ define <8 x i32> @identity_test_vpermd(<8 x i32> %a0) {
|
||||
|
||||
define <8 x float> @identity_test_vpermps(<8 x float> %a0) {
|
||||
; CHECK-LABEL: @identity_test_vpermps(
|
||||
; CHECK-NEXT: ret <8 x float> %a0
|
||||
; CHECK-NEXT: ret <8 x float> [[A0:%.*]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
|
||||
ret <8 x float> %a
|
||||
@ -25,7 +25,7 @@ define <8 x float> @identity_test_vpermps(<8 x float> %a0) {
|
||||
|
||||
define <8 x i32> @zero_test_vpermd(<8 x i32> %a0) {
|
||||
; CHECK-LABEL: @zero_test_vpermd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> zeroinitializer)
|
||||
@ -34,7 +34,7 @@ define <8 x i32> @zero_test_vpermd(<8 x i32> %a0) {
|
||||
|
||||
define <8 x float> @zero_test_vpermps(<8 x float> %a0) {
|
||||
; CHECK-LABEL: @zero_test_vpermps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> zeroinitializer)
|
||||
@ -45,7 +45,7 @@ define <8 x float> @zero_test_vpermps(<8 x float> %a0) {
|
||||
|
||||
define <8 x i32> @shuffle_test_vpermd(<8 x i32> %a0) {
|
||||
; CHECK-LABEL: @shuffle_test_vpermd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -54,7 +54,7 @@ define <8 x i32> @shuffle_test_vpermd(<8 x i32> %a0) {
|
||||
|
||||
define <8 x float> @shuffle_test_vpermps(<8 x float> %a0) {
|
||||
; CHECK-LABEL: @shuffle_test_vpermps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -65,7 +65,7 @@ define <8 x float> @shuffle_test_vpermps(<8 x float> %a0) {
|
||||
|
||||
define <8 x i32> @undef_test_vpermd(<8 x i32> %a0) {
|
||||
; CHECK-LABEL: @undef_test_vpermd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> undef, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -74,7 +74,7 @@ define <8 x i32> @undef_test_vpermd(<8 x i32> %a0) {
|
||||
|
||||
define <8 x float> @undef_test_vpermps(<8 x float> %a0) {
|
||||
; CHECK-LABEL: @undef_test_vpermps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> undef, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -85,7 +85,7 @@ define <8 x float> @undef_test_vpermps(<8 x float> %a0) {
|
||||
|
||||
define <8 x i32> @elts_test_vpermd(<8 x i32> %a0, i32 %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermd(
|
||||
; CHECK-NEXT: ret <8 x i32> %a0
|
||||
; CHECK-NEXT: ret <8 x i32> [[A0:%.*]]
|
||||
;
|
||||
%1 = insertelement <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, i32 %a1, i32 0
|
||||
%2 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %1)
|
||||
@ -95,7 +95,7 @@ define <8 x i32> @elts_test_vpermd(<8 x i32> %a0, i32 %a1) {
|
||||
|
||||
define <8 x float> @elts_test_vpermps(<8 x float> %a0, <8 x i32> %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A0:%.*]], <8 x i32> [[A1:%.*]])
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP2]]
|
||||
;
|
||||
|
||||
@ -759,72 +759,72 @@ define i8 @test_cmp_sd(<2 x double> %a, <2 x double> %b, i8 %mask) {
|
||||
define i64 @test(float %f, double %d) {
|
||||
; CHECK-LABEL: @test(
|
||||
; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> undef, float [[F:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> [[V03]], i32 4)
|
||||
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> [[V03]], i32 4)
|
||||
; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> [[V13]], i32 4)
|
||||
; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> [[V13]], i32 4)
|
||||
; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> [[V23]], i32 4)
|
||||
; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> [[V23]], i32 4)
|
||||
; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> [[V33]], i32 4)
|
||||
; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> [[V33]], i32 4)
|
||||
; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> undef, double [[D:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> [[V41]], i32 4)
|
||||
; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> [[V41]], i32 4)
|
||||
; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> [[V51]], i32 4)
|
||||
; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> [[V51]], i32 4)
|
||||
; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> [[V61]], i32 4)
|
||||
; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> [[V61]], i32 4)
|
||||
; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> [[V71]], i32 4)
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP4]], [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP8]], [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP1]], [[TMP3]]
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP5]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP12]], [[TMP13]]
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP14]], [[TMP11]]
|
||||
; CHECK-NEXT: ret i64 [[TMP15]]
|
||||
; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> [[V71]], i32 4)
|
||||
; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]]
|
||||
; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]]
|
||||
; CHECK-NEXT: [[T10:%.*]] = add i32 [[T8]], [[T9]]
|
||||
; CHECK-NEXT: [[T11:%.*]] = sext i32 [[T10]] to i64
|
||||
; CHECK-NEXT: [[T12:%.*]] = add i64 [[T1]], [[T3]]
|
||||
; CHECK-NEXT: [[T13:%.*]] = add i64 [[T5]], [[T7]]
|
||||
; CHECK-NEXT: [[T14:%.*]] = add i64 [[T12]], [[T13]]
|
||||
; CHECK-NEXT: [[T15:%.*]] = add i64 [[T14]], [[T11]]
|
||||
; CHECK-NEXT: ret i64 [[T15]]
|
||||
;
|
||||
%v00 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1
|
||||
%v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2
|
||||
%v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3
|
||||
%tmp0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %v03, i32 4)
|
||||
%t0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %v03, i32 4)
|
||||
%v10 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1
|
||||
%v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2
|
||||
%v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3
|
||||
%tmp1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %v13, i32 4)
|
||||
%t1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %v13, i32 4)
|
||||
%v20 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1
|
||||
%v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2
|
||||
%v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3
|
||||
%tmp2 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %v23, i32 4)
|
||||
%t2 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %v23, i32 4)
|
||||
%v30 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1
|
||||
%v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2
|
||||
%v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3
|
||||
%tmp3 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> %v33, i32 4)
|
||||
%t3 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> %v33, i32 4)
|
||||
%v40 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1
|
||||
%tmp4 = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %v41, i32 4)
|
||||
%t4 = tail call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %v41, i32 4)
|
||||
%v50 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1
|
||||
%tmp5 = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %v51, i32 4)
|
||||
%t5 = tail call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %v51, i32 4)
|
||||
%v60 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1
|
||||
%tmp6 = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %v61, i32 4)
|
||||
%t6 = tail call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %v61, i32 4)
|
||||
%v70 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1
|
||||
%tmp7 = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> %v71, i32 4)
|
||||
%tmp8 = add i32 %tmp0, %tmp2
|
||||
%tmp9 = add i32 %tmp4, %tmp6
|
||||
%tmp10 = add i32 %tmp8, %tmp9
|
||||
%tmp11 = sext i32 %tmp10 to i64
|
||||
%tmp12 = add i64 %tmp1, %tmp3
|
||||
%tmp13 = add i64 %tmp5, %tmp7
|
||||
%tmp14 = add i64 %tmp12, %tmp13
|
||||
%tmp15 = add i64 %tmp11, %tmp14
|
||||
ret i64 %tmp15
|
||||
%t7 = tail call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> %v71, i32 4)
|
||||
%t8 = add i32 %t0, %t2
|
||||
%t9 = add i32 %t4, %t6
|
||||
%t10 = add i32 %t8, %t9
|
||||
%t11 = sext i32 %t10 to i64
|
||||
%t12 = add i64 %t1, %t3
|
||||
%t13 = add i64 %t5, %t7
|
||||
%t14 = add i64 %t12, %t13
|
||||
%t15 = add i64 %t11, %t14
|
||||
ret i64 %t15
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.avx512.vcvtss2si32(<4 x float>, i32)
|
||||
@ -839,72 +839,72 @@ declare i64 @llvm.x86.avx512.cvttsd2si64(<2 x double>, i32)
|
||||
define i64 @test2(float %f, double %d) {
|
||||
; CHECK-LABEL: @test2(
|
||||
; CHECK-NEXT: [[V03:%.*]] = insertelement <4 x float> undef, float [[F:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> [[V03]], i32 4)
|
||||
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> [[V03]], i32 4)
|
||||
; CHECK-NEXT: [[V13:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> [[V13]], i32 4)
|
||||
; CHECK-NEXT: [[T1:%.*]] = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> [[V13]], i32 4)
|
||||
; CHECK-NEXT: [[V23:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> [[V23]], i32 4)
|
||||
; CHECK-NEXT: [[T2:%.*]] = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> [[V23]], i32 4)
|
||||
; CHECK-NEXT: [[V33:%.*]] = insertelement <4 x float> undef, float [[F]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> [[V33]], i32 4)
|
||||
; CHECK-NEXT: [[T3:%.*]] = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> [[V33]], i32 4)
|
||||
; CHECK-NEXT: [[V41:%.*]] = insertelement <2 x double> undef, double [[D:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> [[V41]], i32 4)
|
||||
; CHECK-NEXT: [[T4:%.*]] = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> [[V41]], i32 4)
|
||||
; CHECK-NEXT: [[V51:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> [[V51]], i32 4)
|
||||
; CHECK-NEXT: [[T5:%.*]] = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> [[V51]], i32 4)
|
||||
; CHECK-NEXT: [[V61:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> [[V61]], i32 4)
|
||||
; CHECK-NEXT: [[T6:%.*]] = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> [[V61]], i32 4)
|
||||
; CHECK-NEXT: [[V71:%.*]] = insertelement <2 x double> undef, double [[D]], i32 0
|
||||
; CHECK-NEXT: [[TMP7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> [[V71]], i32 4)
|
||||
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP4]], [[TMP6]]
|
||||
; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP8]], [[TMP9]]
|
||||
; CHECK-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64
|
||||
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP1]], [[TMP3]]
|
||||
; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP5]], [[TMP7]]
|
||||
; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP12]], [[TMP13]]
|
||||
; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP14]], [[TMP11]]
|
||||
; CHECK-NEXT: ret i64 [[TMP15]]
|
||||
; CHECK-NEXT: [[T7:%.*]] = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> [[V71]], i32 4)
|
||||
; CHECK-NEXT: [[T8:%.*]] = add i32 [[T0]], [[T2]]
|
||||
; CHECK-NEXT: [[T9:%.*]] = add i32 [[T4]], [[T6]]
|
||||
; CHECK-NEXT: [[T10:%.*]] = add i32 [[T8]], [[T9]]
|
||||
; CHECK-NEXT: [[T11:%.*]] = sext i32 [[T10]] to i64
|
||||
; CHECK-NEXT: [[T12:%.*]] = add i64 [[T1]], [[T3]]
|
||||
; CHECK-NEXT: [[T13:%.*]] = add i64 [[T5]], [[T7]]
|
||||
; CHECK-NEXT: [[T14:%.*]] = add i64 [[T12]], [[T13]]
|
||||
; CHECK-NEXT: [[T15:%.*]] = add i64 [[T14]], [[T11]]
|
||||
; CHECK-NEXT: ret i64 [[T15]]
|
||||
;
|
||||
%v00 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1
|
||||
%v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2
|
||||
%v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3
|
||||
%tmp0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %v03, i32 4)
|
||||
%t0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %v03, i32 4)
|
||||
%v10 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1
|
||||
%v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2
|
||||
%v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3
|
||||
%tmp1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %v13, i32 4)
|
||||
%t1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %v13, i32 4)
|
||||
%v20 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1
|
||||
%v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2
|
||||
%v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3
|
||||
%tmp2 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %v23, i32 4)
|
||||
%t2 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %v23, i32 4)
|
||||
%v30 = insertelement <4 x float> undef, float %f, i32 0
|
||||
%v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1
|
||||
%v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2
|
||||
%v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3
|
||||
%tmp3 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> %v33, i32 4)
|
||||
%t3 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> %v33, i32 4)
|
||||
%v40 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1
|
||||
%tmp4 = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %v41, i32 4)
|
||||
%t4 = tail call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %v41, i32 4)
|
||||
%v50 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1
|
||||
%tmp5 = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %v51, i32 4)
|
||||
%t5 = tail call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %v51, i32 4)
|
||||
%v60 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1
|
||||
%tmp6 = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %v61, i32 4)
|
||||
%t6 = tail call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %v61, i32 4)
|
||||
%v70 = insertelement <2 x double> undef, double %d, i32 0
|
||||
%v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1
|
||||
%tmp7 = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> %v71, i32 4)
|
||||
%tmp8 = add i32 %tmp0, %tmp2
|
||||
%tmp9 = add i32 %tmp4, %tmp6
|
||||
%tmp10 = add i32 %tmp8, %tmp9
|
||||
%tmp11 = sext i32 %tmp10 to i64
|
||||
%tmp12 = add i64 %tmp1, %tmp3
|
||||
%tmp13 = add i64 %tmp5, %tmp7
|
||||
%tmp14 = add i64 %tmp12, %tmp13
|
||||
%tmp15 = add i64 %tmp11, %tmp14
|
||||
ret i64 %tmp15
|
||||
%t7 = tail call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> %v71, i32 4)
|
||||
%t8 = add i32 %t0, %t2
|
||||
%t9 = add i32 %t4, %t6
|
||||
%t10 = add i32 %t8, %t9
|
||||
%t11 = sext i32 %t10 to i64
|
||||
%t12 = add i64 %t1, %t3
|
||||
%t13 = add i64 %t5, %t7
|
||||
%t14 = add i64 %t12, %t13
|
||||
%t15 = add i64 %t11, %t14
|
||||
ret i64 %t15
|
||||
}
|
||||
|
||||
declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32)
|
||||
|
||||
@ -11,7 +11,7 @@ declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>)
|
||||
; Only bottom 4 elements required.
|
||||
define <4 x float> @demand_vcvtph2ps_128(<8 x i16> %A) {
|
||||
; CHECK-LABEL: @demand_vcvtph2ps_128(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %A)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> [[A:%.*]])
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%1 = shufflevector <8 x i16> %A, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
||||
@ -22,7 +22,7 @@ define <4 x float> @demand_vcvtph2ps_128(<8 x i16> %A) {
|
||||
; All 8 elements required.
|
||||
define <8 x float> @demand_vcvtph2ps_256(<8 x i16> %A) {
|
||||
; CHECK-LABEL: @demand_vcvtph2ps_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> %A, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> [[TMP1]])
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP2]]
|
||||
;
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
|
||||
define <16 x i8> @identity_test(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test(
|
||||
; CHECK-NEXT: ret <16 x i8> %InVec
|
||||
; CHECK-NEXT: ret <16 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
ret <16 x i8> %1
|
||||
@ -13,7 +13,7 @@ define <16 x i8> @identity_test(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test_avx2(
|
||||
; CHECK-NEXT: ret <32 x i8> %InVec
|
||||
; CHECK-NEXT: ret <32 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
ret <32 x i8> %1
|
||||
@ -21,7 +21,7 @@ define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @identity_test_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test_avx512(
|
||||
; CHECK-NEXT: ret <64 x i8> %InVec
|
||||
; CHECK-NEXT: ret <64 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
ret <64 x i8> %1
|
||||
@ -58,7 +58,7 @@ define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @splat_test(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @splat_test(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> undef, <16 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> zeroinitializer)
|
||||
@ -72,7 +72,7 @@ define <16 x i8> @splat_test(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @splat_test_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @splat_test_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> zeroinitializer)
|
||||
@ -81,7 +81,7 @@ define <32 x i8> @splat_test_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @splat_test_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @splat_test_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> undef, <64 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> undef, <64 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> zeroinitializer)
|
||||
@ -93,7 +93,7 @@ define <64 x i8> @splat_test_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend1(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 1, i32 16, i32 3, i32 16, i32 5, i32 16, i32 7, i32 16, i32 9, i32 16, i32 11, i32 16, i32 13, i32 16, i32 15>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 1, i32 16, i32 3, i32 16, i32 5, i32 16, i32 7, i32 16, i32 9, i32 16, i32 11, i32 16, i32 13, i32 16, i32 15>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15>)
|
||||
@ -102,7 +102,7 @@ define <16 x i8> @blend1(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend2(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 2, i32 3, i32 16, i32 16, i32 6, i32 7, i32 16, i32 16, i32 10, i32 11, i32 16, i32 16, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 2, i32 3, i32 16, i32 16, i32 6, i32 7, i32 16, i32 16, i32 10, i32 11, i32 16, i32 16, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15>)
|
||||
@ -111,7 +111,7 @@ define <16 x i8> @blend2(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend3(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 4, i32 5, i32 6, i32 7, i32 16, i32 16, i32 16, i32 16, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 4, i32 5, i32 6, i32 7, i32 16, i32 16, i32 16, i32 16, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -120,7 +120,7 @@ define <16 x i8> @blend3(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend4(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend4(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -129,7 +129,7 @@ define <16 x i8> @blend4(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend5(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend5(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -138,7 +138,7 @@ define <16 x i8> @blend5(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @blend6(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend6(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -147,7 +147,7 @@ define <16 x i8> @blend6(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend1_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend1_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 1, i32 32, i32 3, i32 32, i32 5, i32 32, i32 7, i32 32, i32 9, i32 32, i32 11, i32 32, i32 13, i32 32, i32 15, i32 48, i32 17, i32 48, i32 19, i32 48, i32 21, i32 48, i32 23, i32 48, i32 25, i32 48, i32 27, i32 48, i32 29, i32 48, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 1, i32 32, i32 3, i32 32, i32 5, i32 32, i32 7, i32 32, i32 9, i32 32, i32 11, i32 32, i32 13, i32 32, i32 15, i32 48, i32 17, i32 48, i32 19, i32 48, i32 21, i32 48, i32 23, i32 48, i32 25, i32 48, i32 27, i32 48, i32 29, i32 48, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15, i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15>)
|
||||
@ -156,7 +156,7 @@ define <32 x i8> @blend1_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend2_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend2_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 2, i32 3, i32 32, i32 32, i32 6, i32 7, i32 32, i32 32, i32 10, i32 11, i32 32, i32 32, i32 14, i32 15, i32 48, i32 48, i32 18, i32 19, i32 48, i32 48, i32 22, i32 23, i32 48, i32 48, i32 26, i32 27, i32 48, i32 48, i32 30, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 2, i32 3, i32 32, i32 32, i32 6, i32 7, i32 32, i32 32, i32 10, i32 11, i32 32, i32 32, i32 14, i32 15, i32 48, i32 48, i32 18, i32 19, i32 48, i32 48, i32 22, i32 23, i32 48, i32 48, i32 26, i32 27, i32 48, i32 48, i32 30, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15, i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15>)
|
||||
@ -165,7 +165,7 @@ define <32 x i8> @blend2_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend3_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend3_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 12, i32 13, i32 14, i32 15, i32 48, i32 48, i32 48, i32 48, i32 20, i32 21, i32 22, i32 23, i32 48, i32 48, i32 48, i32 48, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 12, i32 13, i32 14, i32 15, i32 48, i32 48, i32 48, i32 48, i32 20, i32 21, i32 22, i32 23, i32 48, i32 48, i32 48, i32 48, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -174,7 +174,7 @@ define <32 x i8> @blend3_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend4_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend4_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -183,7 +183,7 @@ define <32 x i8> @blend4_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend5_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend5_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -192,7 +192,7 @@ define <32 x i8> @blend5_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @blend6_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend6_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -201,7 +201,7 @@ define <32 x i8> @blend6_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend1_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend1_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 1, i32 64, i32 3, i32 64, i32 5, i32 64, i32 7, i32 64, i32 9, i32 64, i32 11, i32 64, i32 13, i32 64, i32 15, i32 80, i32 17, i32 80, i32 19, i32 80, i32 21, i32 80, i32 23, i32 80, i32 25, i32 80, i32 27, i32 80, i32 29, i32 80, i32 31, i32 96, i32 33, i32 96, i32 35, i32 96, i32 37, i32 96, i32 39, i32 96, i32 41, i32 96, i32 43, i32 96, i32 45, i32 96, i32 47, i32 112, i32 49, i32 112, i32 51, i32 112, i32 53, i32 112, i32 55, i32 112, i32 57, i32 112, i32 59, i32 112, i32 61, i32 112, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 1, i32 64, i32 3, i32 64, i32 5, i32 64, i32 7, i32 64, i32 9, i32 64, i32 11, i32 64, i32 13, i32 64, i32 15, i32 80, i32 17, i32 80, i32 19, i32 80, i32 21, i32 80, i32 23, i32 80, i32 25, i32 80, i32 27, i32 80, i32 29, i32 80, i32 31, i32 96, i32 33, i32 96, i32 35, i32 96, i32 37, i32 96, i32 39, i32 96, i32 41, i32 96, i32 43, i32 96, i32 45, i32 96, i32 47, i32 112, i32 49, i32 112, i32 51, i32 112, i32 53, i32 112, i32 55, i32 112, i32 57, i32 112, i32 59, i32 112, i32 61, i32 112, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15, i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15, i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15, i8 -128, i8 1, i8 -128, i8 3, i8 -128, i8 5, i8 -128, i8 7, i8 -128, i8 9, i8 -128, i8 11, i8 -128, i8 13, i8 -128, i8 15>)
|
||||
@ -210,7 +210,7 @@ define <64 x i8> @blend1_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend2_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend2_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 2, i32 3, i32 64, i32 64, i32 6, i32 7, i32 64, i32 64, i32 10, i32 11, i32 64, i32 64, i32 14, i32 15, i32 80, i32 80, i32 18, i32 19, i32 80, i32 80, i32 22, i32 23, i32 80, i32 80, i32 26, i32 27, i32 80, i32 80, i32 30, i32 31, i32 96, i32 96, i32 34, i32 35, i32 96, i32 96, i32 38, i32 39, i32 96, i32 96, i32 42, i32 43, i32 96, i32 96, i32 46, i32 47, i32 112, i32 112, i32 50, i32 51, i32 112, i32 112, i32 54, i32 55, i32 112, i32 112, i32 58, i32 59, i32 112, i32 112, i32 62, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 2, i32 3, i32 64, i32 64, i32 6, i32 7, i32 64, i32 64, i32 10, i32 11, i32 64, i32 64, i32 14, i32 15, i32 80, i32 80, i32 18, i32 19, i32 80, i32 80, i32 22, i32 23, i32 80, i32 80, i32 26, i32 27, i32 80, i32 80, i32 30, i32 31, i32 96, i32 96, i32 34, i32 35, i32 96, i32 96, i32 38, i32 39, i32 96, i32 96, i32 42, i32 43, i32 96, i32 96, i32 46, i32 47, i32 112, i32 112, i32 50, i32 51, i32 112, i32 112, i32 54, i32 55, i32 112, i32 112, i32 58, i32 59, i32 112, i32 112, i32 62, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15, i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15, i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15, i8 -128, i8 -128, i8 2, i8 3, i8 -128, i8 -128, i8 6, i8 7, i8 -128, i8 -128, i8 10, i8 11, i8 -128, i8 -128, i8 14, i8 15>)
|
||||
@ -219,7 +219,7 @@ define <64 x i8> @blend2_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend3_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend3_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 64, i32 64, i32 4, i32 5, i32 6, i32 7, i32 64, i32 64, i32 64, i32 64, i32 12, i32 13, i32 14, i32 15, i32 80, i32 80, i32 80, i32 80, i32 20, i32 21, i32 22, i32 23, i32 80, i32 80, i32 80, i32 80, i32 28, i32 29, i32 30, i32 31, i32 96, i32 96, i32 96, i32 96, i32 36, i32 37, i32 38, i32 39, i32 96, i32 96, i32 96, i32 96, i32 44, i32 45, i32 46, i32 47, i32 112, i32 112, i32 112, i32 112, i32 52, i32 53, i32 54, i32 55, i32 112, i32 112, i32 112, i32 112, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 64, i32 64, i32 4, i32 5, i32 6, i32 7, i32 64, i32 64, i32 64, i32 64, i32 12, i32 13, i32 14, i32 15, i32 80, i32 80, i32 80, i32 80, i32 20, i32 21, i32 22, i32 23, i32 80, i32 80, i32 80, i32 80, i32 28, i32 29, i32 30, i32 31, i32 96, i32 96, i32 96, i32 96, i32 36, i32 37, i32 38, i32 39, i32 96, i32 96, i32 96, i32 96, i32 44, i32 45, i32 46, i32 47, i32 112, i32 112, i32 112, i32 112, i32 52, i32 53, i32 54, i32 55, i32 112, i32 112, i32 112, i32 112, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -228,7 +228,7 @@ define <64 x i8> @blend3_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend4_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend4_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -237,7 +237,7 @@ define <64 x i8> @blend4_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend5_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend5_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 16, i32 17, i32 18, i32 19, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 32, i32 33, i32 34, i32 35, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 48, i32 49, i32 50, i32 51, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 16, i32 17, i32 18, i32 19, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 32, i32 33, i32 34, i32 35, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 48, i32 49, i32 50, i32 51, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 2, i8 3, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -246,7 +246,7 @@ define <64 x i8> @blend5_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @blend6_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @blend6_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 16, i32 17, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 32, i32 33, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 48, i32 49, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 16, i32 17, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 32, i32 33, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 48, i32 49, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128,i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 0, i8 1, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -256,7 +256,7 @@ define <64 x i8> @blend6_avx512(<64 x i8> %InVec) {
|
||||
; movq idiom.
|
||||
define <16 x i8> @movq_idiom(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @movq_idiom(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -265,7 +265,7 @@ define <16 x i8> @movq_idiom(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @movq_idiom_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @movq_idiom_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48, i32 48>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -274,7 +274,7 @@ define <32 x i8> @movq_idiom_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @movq_idiom_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @movq_idiom_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 80, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 96, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112, i32 112>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128, i8 -128>)
|
||||
@ -285,7 +285,7 @@ define <64 x i8> @movq_idiom_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @permute1(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute1(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -294,7 +294,7 @@ define <16 x i8> @permute1(<16 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @permute2(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
||||
@ -303,7 +303,7 @@ define <16 x i8> @permute2(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @permute1_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute1_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15, i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -312,7 +312,7 @@ define <32 x i8> @permute1_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @permute2_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute2_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
||||
@ -321,7 +321,7 @@ define <32 x i8> @permute2_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @permute1_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute1_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> undef, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> undef, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15, i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15, i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15, i8 4, i8 5, i8 6, i8 7, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 12, i8 13, i8 14, i8 15>)
|
||||
@ -330,7 +330,7 @@ define <64 x i8> @permute1_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @permute2_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute2_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
||||
@ -342,7 +342,7 @@ define <64 x i8> @permute2_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @identity_test2_2(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test2_2(
|
||||
; CHECK-NEXT: ret <16 x i8> %InVec
|
||||
; CHECK-NEXT: ret <16 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>)
|
||||
ret <16 x i8> %1
|
||||
@ -350,7 +350,7 @@ define <16 x i8> @identity_test2_2(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @identity_test_avx2_2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test_avx2_2(
|
||||
; CHECK-NEXT: ret <32 x i8> %InVec
|
||||
; CHECK-NEXT: ret <32 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 16, i8 33, i8 66, i8 19, i8 36, i8 69, i8 22, i8 39, i8 72, i8 25, i8 42, i8 75, i8 28, i8 45, i8 78, i8 31, i8 48, i8 81, i8 34, i8 51, i8 84, i8 37, i8 54, i8 87, i8 40, i8 57, i8 90, i8 43, i8 60, i8 93, i8 46, i8 63>)
|
||||
ret <32 x i8> %1
|
||||
@ -358,7 +358,7 @@ define <32 x i8> @identity_test_avx2_2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @identity_test_avx512_2(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @identity_test_avx512_2(
|
||||
; CHECK-NEXT: ret <64 x i8> %InVec
|
||||
; CHECK-NEXT: ret <64 x i8> [[INVEC:%.*]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 16, i8 33, i8 66, i8 19, i8 36, i8 69, i8 22, i8 39, i8 72, i8 25, i8 42, i8 75, i8 28, i8 45, i8 78, i8 31, i8 48, i8 81, i8 34, i8 51, i8 84, i8 37, i8 54, i8 87, i8 40, i8 57, i8 90, i8 43, i8 60, i8 93, i8 46, i8 63, i8 96, i8 49, i8 66, i8 99, i8 52, i8 69, i8 102, i8 55, i8 72, i8 105, i8 58, i8 75, i8 108, i8 61, i8 78, i8 111, i8 64, i8 81, i8 114, i8 67, i8 84, i8 117, i8 70, i8 87, i8 120, i8 73, i8 90, i8 123, i8 76, i8 93, i8 126, i8 79>)
|
||||
ret <64 x i8> %1
|
||||
@ -390,7 +390,7 @@ define <64 x i8> @fold_to_zero_vector_avx512_2(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @permute3(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute3(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 48, i8 17, i8 34, i8 51, i8 20, i8 37, i8 54, i8 23, i8 16, i8 49, i8 66, i8 19, i8 52, i8 69, i8 22, i8 55>)
|
||||
@ -399,7 +399,7 @@ define <16 x i8> @permute3(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @permute3_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute3_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 52, i8 21, i8 38, i8 55, i8 20, i8 37, i8 54, i8 23, i8 28, i8 61, i8 78, i8 31, i8 60, i8 29, i8 30, i8 79, i8 52, i8 21, i8 38, i8 55, i8 20, i8 53, i8 102, i8 23, i8 92, i8 93, i8 94, i8 95, i8 108, i8 109, i8 110, i8 111>)
|
||||
@ -408,7 +408,7 @@ define <32 x i8> @permute3_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @permute3_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @permute3_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> undef, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> undef, <64 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 20, i32 21, i32 22, i32 23, i32 20, i32 21, i32 22, i32 23, i32 28, i32 29, i32 30, i32 31, i32 28, i32 29, i32 30, i32 31, i32 36, i32 37, i32 38, i32 39, i32 36, i32 37, i32 38, i32 39, i32 44, i32 45, i32 46, i32 47, i32 44, i32 45, i32 46, i32 47, i32 52, i32 53, i32 54, i32 55, i32 52, i32 53, i32 54, i32 55, i32 60, i32 61, i32 62, i32 63, i32 60, i32 61, i32 62, i32 63>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 52, i8 21, i8 38, i8 55, i8 20, i8 37, i8 54, i8 23, i8 28, i8 61, i8 78, i8 31, i8 60, i8 29, i8 30, i8 79, i8 52, i8 21, i8 38, i8 55, i8 20, i8 53, i8 102, i8 23, i8 92, i8 93, i8 94, i8 95, i8 108, i8 109, i8 110, i8 111, i8 52, i8 21, i8 38, i8 55, i8 20, i8 37, i8 54, i8 23, i8 28, i8 61, i8 78, i8 31, i8 60, i8 29, i8 30, i8 79, i8 52, i8 21, i8 38, i8 55, i8 20, i8 53, i8 102, i8 23, i8 108, i8 109, i8 110, i8 111, i8 124, i8 125, i8 126, i8 127>)
|
||||
@ -419,7 +419,7 @@ define <64 x i8> @permute3_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @fold_with_undef_elts(<16 x i8> %InVec) {
|
||||
; CHECK-LABEL: @fold_with_undef_elts(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> %InVec, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 16, i32 undef, i32 16, i32 1, i32 16, i32 undef, i32 16, i32 2, i32 16, i32 undef, i32 16, i32 3, i32 16, i32 undef, i32 16>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 0, i32 16, i32 undef, i32 16, i32 1, i32 16, i32 undef, i32 16, i32 2, i32 16, i32 undef, i32 16, i32 3, i32 16, i32 undef, i32 16>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>)
|
||||
@ -428,7 +428,7 @@ define <16 x i8> @fold_with_undef_elts(<16 x i8> %InVec) {
|
||||
|
||||
define <32 x i8> @fold_with_undef_elts_avx2(<32 x i8> %InVec) {
|
||||
; CHECK-LABEL: @fold_with_undef_elts_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> %InVec, <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 32, i32 undef, i32 32, i32 1, i32 32, i32 undef, i32 32, i32 2, i32 32, i32 undef, i32 32, i32 3, i32 32, i32 undef, i32 32, i32 16, i32 48, i32 undef, i32 48, i32 17, i32 48, i32 undef, i32 48, i32 18, i32 48, i32 undef, i32 48, i32 19, i32 48, i32 undef, i32 48>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[INVEC:%.*]], <32 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <32 x i32> <i32 0, i32 32, i32 undef, i32 32, i32 1, i32 32, i32 undef, i32 32, i32 2, i32 32, i32 undef, i32 32, i32 3, i32 32, i32 undef, i32 32, i32 16, i32 48, i32 undef, i32 48, i32 17, i32 48, i32 undef, i32 48, i32 18, i32 48, i32 undef, i32 48, i32 19, i32 48, i32 undef, i32 48>
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>)
|
||||
@ -437,7 +437,7 @@ define <32 x i8> @fold_with_undef_elts_avx2(<32 x i8> %InVec) {
|
||||
|
||||
define <64 x i8> @fold_with_undef_elts_avx512(<64 x i8> %InVec) {
|
||||
; CHECK-LABEL: @fold_with_undef_elts_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> %InVec, <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 64, i32 undef, i32 64, i32 1, i32 64, i32 undef, i32 64, i32 2, i32 64, i32 undef, i32 64, i32 3, i32 64, i32 undef, i32 64, i32 16, i32 80, i32 undef, i32 80, i32 17, i32 80, i32 undef, i32 80, i32 18, i32 80, i32 undef, i32 80, i32 19, i32 80, i32 undef, i32 80, i32 32, i32 96, i32 undef, i32 96, i32 33, i32 96, i32 undef, i32 96, i32 34, i32 96, i32 undef, i32 96, i32 35, i32 96, i32 undef, i32 96, i32 48, i32 112, i32 undef, i32 112, i32 49, i32 112, i32 undef, i32 112, i32 50, i32 112, i32 undef, i32 112, i32 51, i32 112, i32 undef, i32 112>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[INVEC:%.*]], <64 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <64 x i32> <i32 0, i32 64, i32 undef, i32 64, i32 1, i32 64, i32 undef, i32 64, i32 2, i32 64, i32 undef, i32 64, i32 3, i32 64, i32 undef, i32 64, i32 16, i32 80, i32 undef, i32 80, i32 17, i32 80, i32 undef, i32 80, i32 18, i32 80, i32 undef, i32 80, i32 19, i32 80, i32 undef, i32 80, i32 32, i32 96, i32 undef, i32 96, i32 33, i32 96, i32 undef, i32 96, i32 34, i32 96, i32 undef, i32 96, i32 35, i32 96, i32 undef, i32 96, i32 48, i32 112, i32 undef, i32 112, i32 49, i32 112, i32 undef, i32 112, i32 50, i32 112, i32 undef, i32 112, i32 51, i32 112, i32 undef, i32 112>
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>)
|
||||
@ -472,7 +472,7 @@ define <64 x i8> @fold_with_allundef_elts_avx512(<64 x i8> %InVec) {
|
||||
|
||||
define <16 x i8> @demanded_elts_insertion(<16 x i8> %InVec, <16 x i8> %BaseMask, i8 %M0, i8 %M15) {
|
||||
; CHECK-LABEL: @demanded_elts_insertion(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> %BaseMask)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> [[INVEC:%.*]], <16 x i8> [[BASEMASK:%.*]])
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <16 x i32> <i32 undef, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 undef>
|
||||
; CHECK-NEXT: ret <16 x i8> [[TMP2]]
|
||||
;
|
||||
@ -485,7 +485,7 @@ define <16 x i8> @demanded_elts_insertion(<16 x i8> %InVec, <16 x i8> %BaseMask,
|
||||
|
||||
define <32 x i8> @demanded_elts_insertion_avx2(<32 x i8> %InVec, <32 x i8> %BaseMask, i8 %M0, i8 %M22) {
|
||||
; CHECK-LABEL: @demanded_elts_insertion_avx2(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> %BaseMask)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> [[INVEC:%.*]], <32 x i8> [[BASEMASK:%.*]])
|
||||
; CHECK-NEXT: ret <32 x i8> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <32 x i8> %BaseMask, i8 %M0, i32 0
|
||||
@ -497,8 +497,8 @@ define <32 x i8> @demanded_elts_insertion_avx2(<32 x i8> %InVec, <32 x i8> %Base
|
||||
|
||||
define <64 x i8> @demanded_elts_insertion_avx512(<64 x i8> %InVec, <64 x i8> %BaseMask, i8 %M0, i8 %M30) {
|
||||
; CHECK-LABEL: @demanded_elts_insertion_avx512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> undef, i8 %M0, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> %InVec, <64 x i8> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <64 x i8> undef, i8 [[M0:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <64 x i8> @llvm.x86.avx512.pshuf.b.512(<64 x i8> [[INVEC:%.*]], <64 x i8> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <64 x i8> [[TMP2]], <64 x i8> undef, <64 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <64 x i8> [[TMP3]]
|
||||
;
|
||||
|
||||
@ -4,7 +4,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
|
||||
define float @test_rcp_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_rcp_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
@ -33,7 +33,7 @@ define float @test_rcp_ss_1(float %a) {
|
||||
|
||||
define float @test_sqrt_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_sqrt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.sqrt.f32(float %a)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.sqrt.f32(float [[A:%.*]])
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -60,7 +60,7 @@ define float @test_sqrt_ss_2(float %a) {
|
||||
|
||||
define float @test_rsqrt_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_rsqrt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
@ -89,7 +89,7 @@ define float @test_rsqrt_ss_3(float %a) {
|
||||
|
||||
define float @test_add_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_add_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fadd float %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fadd float [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -121,7 +121,7 @@ define float @test_add_ss_1(float %a, float %b) {
|
||||
|
||||
define float @test_sub_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_sub_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fsub float %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fsub float [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -153,7 +153,7 @@ define float @test_sub_ss_2(float %a, float %b) {
|
||||
|
||||
define float @test_mul_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_mul_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fmul float %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fmul float [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -185,7 +185,7 @@ define float @test_mul_ss_3(float %a, float %b) {
|
||||
|
||||
define float @test_div_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_div_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fdiv float %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = fdiv float [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: ret float [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> undef, float %a, i32 0
|
||||
@ -217,7 +217,7 @@ define float @test_div_ss_1(float %a, float %b) {
|
||||
|
||||
define <4 x float> @test_min_ss(<4 x float> %a, <4 x float> %b) {
|
||||
; CHECK-LABEL: @test_min_ss(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a, <4 x float> %b)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]])
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> %b, float 1.000000e+00, i32 1
|
||||
@ -229,8 +229,8 @@ define <4 x float> @test_min_ss(<4 x float> %a, <4 x float> %b) {
|
||||
|
||||
define float @test_min_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_min_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP4]]
|
||||
@ -264,7 +264,7 @@ define float @test_min_ss_2(float %a, float %b) {
|
||||
|
||||
define <4 x float> @test_max_ss(<4 x float> %a, <4 x float> %b) {
|
||||
; CHECK-LABEL: @test_max_ss(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a, <4 x float> %b)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]])
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> %b, float 1.000000e+00, i32 1
|
||||
@ -276,8 +276,8 @@ define <4 x float> @test_max_ss(<4 x float> %a, <4 x float> %b) {
|
||||
|
||||
define float @test_max_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_max_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP4]]
|
||||
@ -311,7 +311,7 @@ define float @test_max_ss_3(float %a, float %b) {
|
||||
|
||||
define <4 x float> @test_cmp_ss(<4 x float> %a, <4 x float> %b) {
|
||||
; CHECK-LABEL: @test_cmp_ss(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a, <4 x float> %b, i8 0)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], i8 0)
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> %b, float 1.000000e+00, i32 1
|
||||
@ -323,8 +323,8 @@ define <4 x float> @test_cmp_ss(<4 x float> %a, <4 x float> %b) {
|
||||
|
||||
define float @test_cmp_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_cmp_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]], i8 0)
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
@ -358,8 +358,8 @@ define float @test_cmp_ss_1(float %a, float %b) {
|
||||
|
||||
define i32 @test_comieq_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comieq_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -377,8 +377,8 @@ define i32 @test_comieq_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_comige_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comige_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -396,8 +396,8 @@ define i32 @test_comige_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_comigt_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comigt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -415,8 +415,8 @@ define i32 @test_comigt_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_comile_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comile_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -434,8 +434,8 @@ define i32 @test_comile_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_comilt_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comilt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -453,8 +453,8 @@ define i32 @test_comilt_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_comineq_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_comineq_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -472,8 +472,8 @@ define i32 @test_comineq_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomieq_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomieq_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -491,8 +491,8 @@ define i32 @test_ucomieq_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomige_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomige_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomige.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -510,8 +510,8 @@ define i32 @test_ucomige_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomigt_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomigt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -529,8 +529,8 @@ define i32 @test_ucomigt_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomile_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomile_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomile.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -548,8 +548,8 @@ define i32 @test_ucomile_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomilt_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomilt_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
@ -567,8 +567,8 @@ define i32 @test_ucomilt_ss_0(float %a, float %b) {
|
||||
|
||||
define i32 @test_ucomineq_ss_0(float %a, float %b) {
|
||||
; CHECK-LABEL: @test_ucomineq_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float %b, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> undef, float [[B:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> [[TMP1]], <4 x float> [[TMP2]])
|
||||
; CHECK-NEXT: ret i32 [[TMP3]]
|
||||
;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -6,7 +6,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
|
||||
define <4 x float> @identity_test_vpermilvar_ps(<4 x float> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_ps(
|
||||
; CHECK-NEXT: ret <4 x float> %v
|
||||
; CHECK-NEXT: ret <4 x float> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 0, i32 1, i32 2, i32 3>)
|
||||
ret <4 x float> %a
|
||||
@ -14,7 +14,7 @@ define <4 x float> @identity_test_vpermilvar_ps(<4 x float> %v) {
|
||||
|
||||
define <8 x float> @identity_test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_ps_256(
|
||||
; CHECK-NEXT: ret <8 x float> %v
|
||||
; CHECK-NEXT: ret <8 x float> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>)
|
||||
ret <8 x float> %a
|
||||
@ -22,7 +22,7 @@ define <8 x float> @identity_test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
|
||||
define <16 x float> @identity_test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_ps_512(
|
||||
; CHECK-NEXT: ret <16 x float> %v
|
||||
; CHECK-NEXT: ret <16 x float> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %v, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>)
|
||||
ret <16 x float> %a
|
||||
@ -30,7 +30,7 @@ define <16 x float> @identity_test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
|
||||
define <2 x double> @identity_test_vpermilvar_pd(<2 x double> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_pd(
|
||||
; CHECK-NEXT: ret <2 x double> %v
|
||||
; CHECK-NEXT: ret <2 x double> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 0, i64 2>)
|
||||
ret <2 x double> %a
|
||||
@ -38,7 +38,7 @@ define <2 x double> @identity_test_vpermilvar_pd(<2 x double> %v) {
|
||||
|
||||
define <4 x double> @identity_test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_pd_256(
|
||||
; CHECK-NEXT: ret <4 x double> %v
|
||||
; CHECK-NEXT: ret <4 x double> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 0, i64 2, i64 0, i64 2>)
|
||||
ret <4 x double> %a
|
||||
@ -46,7 +46,7 @@ define <4 x double> @identity_test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
|
||||
define <8 x double> @identity_test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
; CHECK-LABEL: @identity_test_vpermilvar_pd_512(
|
||||
; CHECK-NEXT: ret <8 x double> %v
|
||||
; CHECK-NEXT: ret <8 x double> [[V:%.*]]
|
||||
;
|
||||
%a = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %v, <8 x i64> <i64 0, i64 2, i64 0, i64 2, i64 0, i64 2, i64 0, i64 2>)
|
||||
ret <8 x double> %a
|
||||
@ -57,7 +57,7 @@ define <8 x double> @identity_test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
|
||||
define <4 x float> @zero_test_vpermilvar_ps_zero(<4 x float> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_ps_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[V:%.*]], <4 x float> undef, <4 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> zeroinitializer)
|
||||
@ -66,7 +66,7 @@ define <4 x float> @zero_test_vpermilvar_ps_zero(<4 x float> %v) {
|
||||
|
||||
define <8 x float> @zero_test_vpermilvar_ps_256_zero(<8 x float> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_ps_256_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[V:%.*]], <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> zeroinitializer)
|
||||
@ -75,7 +75,7 @@ define <8 x float> @zero_test_vpermilvar_ps_256_zero(<8 x float> %v) {
|
||||
|
||||
define <16 x float> @zero_test_vpermilvar_ps_512_zero(<16 x float> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_ps_512_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> %v, <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 8, i32 8, i32 8, i32 8, i32 12, i32 12, i32 12, i32 12>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[V:%.*]], <16 x float> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4, i32 8, i32 8, i32 8, i32 8, i32 12, i32 12, i32 12, i32 12>
|
||||
; CHECK-NEXT: ret <16 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %v, <16 x i32> zeroinitializer)
|
||||
@ -84,7 +84,7 @@ define <16 x float> @zero_test_vpermilvar_ps_512_zero(<16 x float> %v) {
|
||||
|
||||
define <2 x double> @zero_test_vpermilvar_pd_zero(<2 x double> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_pd_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[V:%.*]], <2 x double> undef, <2 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> zeroinitializer)
|
||||
@ -93,7 +93,7 @@ define <2 x double> @zero_test_vpermilvar_pd_zero(<2 x double> %v) {
|
||||
|
||||
define <4 x double> @zero_test_vpermilvar_pd_256_zero(<4 x double> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_pd_256_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V:%.*]], <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
|
||||
; CHECK-NEXT: ret <4 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> zeroinitializer)
|
||||
@ -102,7 +102,7 @@ define <4 x double> @zero_test_vpermilvar_pd_256_zero(<4 x double> %v) {
|
||||
|
||||
define <8 x double> @zero_test_vpermilvar_pd_512_zero(<8 x double> %v) {
|
||||
; CHECK-LABEL: @zero_test_vpermilvar_pd_512_zero(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> %v, <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[V:%.*]], <8 x double> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %v, <8 x i64> zeroinitializer)
|
||||
@ -113,7 +113,7 @@ define <8 x double> @zero_test_vpermilvar_pd_512_zero(<8 x double> %v) {
|
||||
|
||||
define <4 x float> @test_vpermilvar_ps(<4 x float> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_ps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[V:%.*]], <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -122,7 +122,7 @@ define <4 x float> @test_vpermilvar_ps(<4 x float> %v) {
|
||||
|
||||
define <8 x float> @test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_ps_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[V:%.*]], <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -131,7 +131,7 @@ define <8 x float> @test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
|
||||
define <16 x float> @test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_ps_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> %v, <16 x float> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[V:%.*]], <16 x float> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
|
||||
; CHECK-NEXT: ret <16 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %v, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -140,7 +140,7 @@ define <16 x float> @test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
|
||||
define <2 x double> @test_vpermilvar_pd(<2 x double> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_pd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[V:%.*]], <2 x double> undef, <2 x i32> <i32 1, i32 0>
|
||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 2, i64 0>)
|
||||
@ -149,7 +149,7 @@ define <2 x double> @test_vpermilvar_pd(<2 x double> %v) {
|
||||
|
||||
define <4 x double> @test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_pd_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V:%.*]], <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
|
||||
; CHECK-NEXT: ret <4 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 3, i64 1, i64 2, i64 0>)
|
||||
@ -158,7 +158,7 @@ define <4 x double> @test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
|
||||
define <8 x double> @test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
; CHECK-LABEL: @test_vpermilvar_pd_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> %v, <8 x double> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[V:%.*]], <8 x double> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %v, <8 x i64> <i64 3, i64 1, i64 2, i64 0, i64 7, i64 5, i64 6, i64 4>)
|
||||
@ -169,7 +169,7 @@ define <8 x double> @test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
|
||||
define <4 x float> @undef_test_vpermilvar_ps(<4 x float> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_ps(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 undef>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[V:%.*]], <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 undef>
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 undef, i32 2, i32 1, i32 undef>)
|
||||
@ -178,7 +178,7 @@ define <4 x float> @undef_test_vpermilvar_ps(<4 x float> %v) {
|
||||
|
||||
define <8 x float> @undef_test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_ps_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 undef, i32 2, i32 1, i32 undef, i32 7, i32 6, i32 5, i32 4>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[V:%.*]], <8 x float> undef, <8 x i32> <i32 undef, i32 2, i32 1, i32 undef, i32 7, i32 6, i32 5, i32 4>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 undef, i32 6, i32 5, i32 undef, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -187,7 +187,7 @@ define <8 x float> @undef_test_vpermilvar_ps_256(<8 x float> %v) {
|
||||
|
||||
define <16 x float> @undef_test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_ps_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> %v, <16 x float> undef, <16 x i32> <i32 undef, i32 2, i32 1, i32 undef, i32 7, i32 6, i32 5, i32 4, i32 undef, i32 10, i32 9, i32 undef, i32 15, i32 14, i32 13, i32 12>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[V:%.*]], <16 x float> undef, <16 x i32> <i32 undef, i32 2, i32 1, i32 undef, i32 7, i32 6, i32 5, i32 4, i32 undef, i32 10, i32 9, i32 undef, i32 15, i32 14, i32 13, i32 12>
|
||||
; CHECK-NEXT: ret <16 x float> [[TMP1]]
|
||||
;
|
||||
%a = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %v, <16 x i32> <i32 undef, i32 6, i32 5, i32 undef, i32 3, i32 2, i32 1, i32 0, i32 undef, i32 6, i32 5, i32 undef, i32 3, i32 2, i32 1, i32 0>)
|
||||
@ -196,7 +196,7 @@ define <16 x float> @undef_test_vpermilvar_ps_512(<16 x float> %v) {
|
||||
|
||||
define <2 x double> @undef_test_vpermilvar_pd(<2 x double> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_pd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 undef, i32 0>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[V:%.*]], <2 x double> undef, <2 x i32> <i32 undef, i32 0>
|
||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 undef, i64 0>)
|
||||
@ -205,7 +205,7 @@ define <2 x double> @undef_test_vpermilvar_pd(<2 x double> %v) {
|
||||
|
||||
define <4 x double> @undef_test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_pd_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 undef, i32 0, i32 3, i32 undef>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V:%.*]], <4 x double> undef, <4 x i32> <i32 undef, i32 0, i32 3, i32 undef>
|
||||
; CHECK-NEXT: ret <4 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 undef, i64 1, i64 2, i64 undef>)
|
||||
@ -214,7 +214,7 @@ define <4 x double> @undef_test_vpermilvar_pd_256(<4 x double> %v) {
|
||||
|
||||
define <8 x double> @undef_test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
; CHECK-LABEL: @undef_test_vpermilvar_pd_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> %v, <8 x double> undef, <8 x i32> <i32 undef, i32 0, i32 3, i32 undef, i32 undef, i32 4, i32 7, i32 undef>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[V:%.*]], <8 x double> undef, <8 x i32> <i32 undef, i32 0, i32 3, i32 undef, i32 undef, i32 4, i32 7, i32 undef>
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP1]]
|
||||
;
|
||||
%a = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %v, <8 x i64> <i64 undef, i64 1, i64 2, i64 undef, i64 undef, i64 1, i64 2, i64 undef>)
|
||||
@ -225,7 +225,7 @@ define <8 x double> @undef_test_vpermilvar_pd_512(<8 x double> %v) {
|
||||
|
||||
define <4 x float> @elts_test_vpermilvar_ps(<4 x float> %a0, i32 %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_ps(
|
||||
; CHECK-NEXT: ret <4 x float> %a0
|
||||
; CHECK-NEXT: ret <4 x float> [[A0:%.*]]
|
||||
;
|
||||
%1 = insertelement <4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 %a1, i32 3
|
||||
%2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %1)
|
||||
@ -235,7 +235,7 @@ define <4 x float> @elts_test_vpermilvar_ps(<4 x float> %a0, i32 %a1) {
|
||||
|
||||
define <8 x float> @elts_test_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_ps_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 undef, i32 0, i32 undef, i32 1, i32 undef, i32 6, i32 undef, i32 7>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> undef, <8 x i32> <i32 undef, i32 0, i32 undef, i32 1, i32 undef, i32 6, i32 undef, i32 7>
|
||||
; CHECK-NEXT: ret <8 x float> [[TMP1]]
|
||||
;
|
||||
%1 = shufflevector <8 x i32> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 3, i32 2, i32 1, i32 0>, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
|
||||
@ -246,7 +246,7 @@ define <8 x float> @elts_test_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a1)
|
||||
|
||||
define <16 x float> @elts_test_vpermilvar_ps_512(<16 x float> %a0, <16 x i32> %a1, i32 %a2) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_ps_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> %a0, <16 x i32> %a1)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x float> @llvm.x86.avx512.vpermilvar.ps.512(<16 x float> [[A0:%.*]], <16 x i32> [[A1:%.*]])
|
||||
; CHECK-NEXT: ret <16 x float> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <16 x i32> %a1, i32 %a2, i32 0
|
||||
@ -257,7 +257,7 @@ define <16 x float> @elts_test_vpermilvar_ps_512(<16 x float> %a0, <16 x i32> %a
|
||||
|
||||
define <2 x double> @elts_test_vpermilvar_pd(<2 x double> %a0, i64 %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_pd(
|
||||
; CHECK-NEXT: ret <2 x double> %a0
|
||||
; CHECK-NEXT: ret <2 x double> [[A0:%.*]]
|
||||
;
|
||||
%1 = insertelement <2 x i64> <i64 0, i64 2>, i64 %a1, i32 1
|
||||
%2 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> %1)
|
||||
@ -267,7 +267,7 @@ define <2 x double> @elts_test_vpermilvar_pd(<2 x double> %a0, i64 %a1) {
|
||||
|
||||
define <4 x double> @elts_test_vpermilvar_pd_256(<4 x double> %a0, <4 x i64> %a1) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_pd_256(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 undef>
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 undef>
|
||||
; CHECK-NEXT: ret <4 x double> [[TMP1]]
|
||||
;
|
||||
%1 = shufflevector <4 x i64> <i64 0, i64 2, i64 0, i64 2>, <4 x i64> %a1, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
|
||||
@ -278,8 +278,8 @@ define <4 x double> @elts_test_vpermilvar_pd_256(<4 x double> %a0, <4 x i64> %a1
|
||||
|
||||
define <8 x double> @elts_test_vpermilvar_pd_512(<8 x double> %a0, <8 x i64> %a1, i64 %a2) {
|
||||
; CHECK-LABEL: @elts_test_vpermilvar_pd_512(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> undef, i64 %a2, i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> %a0, <8 x i64> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i64> undef, i64 [[A2:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x double> @llvm.x86.avx512.vpermilvar.pd.512(<8 x double> [[A0:%.*]], <8 x i64> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> undef, <8 x i32> zeroinitializer
|
||||
; CHECK-NEXT: ret <8 x double> [[TMP3]]
|
||||
;
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
|
||||
define <2 x double> @test_vfrcz_sd(<2 x double> %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_sd(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> %a)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[A:%.*]])
|
||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <2 x double> %a, double 1.000000e+00, i32 1
|
||||
@ -13,7 +13,7 @@ define <2 x double> @test_vfrcz_sd(<2 x double> %a) {
|
||||
|
||||
define double @test_vfrcz_sd_0(double %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_sd_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double %a, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> undef, double [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret double [[TMP3]]
|
||||
@ -38,7 +38,7 @@ define double @test_vfrcz_sd_1(double %a) {
|
||||
|
||||
define <4 x float> @test_vfrcz_ss(<4 x float> %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_ss(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> %a)
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[A:%.*]])
|
||||
; CHECK-NEXT: ret <4 x float> [[TMP1]]
|
||||
;
|
||||
%1 = insertelement <4 x float> %a, float 1.000000e+00, i32 1
|
||||
@ -50,7 +50,7 @@ define <4 x float> @test_vfrcz_ss(<4 x float> %a) {
|
||||
|
||||
define float @test_vfrcz_ss_0(float %a) {
|
||||
; CHECK-LABEL: @test_vfrcz_ss_0(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float %a, i32 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[A:%.*]], i32 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> [[TMP1]])
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 0
|
||||
; CHECK-NEXT: ret float [[TMP3]]
|
||||
@ -79,7 +79,7 @@ define float @test_vfrcz_ss_3(float %a) {
|
||||
|
||||
define <2 x i64> @cmp_slt_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
; CHECK-LABEL: @cmp_slt_v2i64(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i64> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i64> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i64>
|
||||
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
|
||||
;
|
||||
@ -89,7 +89,7 @@ define <2 x i64> @cmp_slt_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
|
||||
define <2 x i64> @cmp_ult_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
; CHECK-LABEL: @cmp_ult_v2i64(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i64>
|
||||
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
|
||||
;
|
||||
@ -99,7 +99,7 @@ define <2 x i64> @cmp_ult_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
|
||||
define <2 x i64> @cmp_sle_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
; CHECK-LABEL: @cmp_sle_v2i64(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sle <2 x i64> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sle <2 x i64> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i64>
|
||||
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
|
||||
;
|
||||
@ -109,7 +109,7 @@ define <2 x i64> @cmp_sle_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
|
||||
define <2 x i64> @cmp_ule_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
; CHECK-LABEL: @cmp_ule_v2i64(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <2 x i64> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule <2 x i64> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i1> [[TMP1]] to <2 x i64>
|
||||
; CHECK-NEXT: ret <2 x i64> [[TMP2]]
|
||||
;
|
||||
@ -119,7 +119,7 @@ define <2 x i64> @cmp_ule_v2i64(<2 x i64> %a, <2 x i64> %b) {
|
||||
|
||||
define <4 x i32> @cmp_sgt_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
; CHECK-LABEL: @cmp_sgt_v4i32(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
|
||||
;
|
||||
@ -129,7 +129,7 @@ define <4 x i32> @cmp_sgt_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
|
||||
define <4 x i32> @cmp_ugt_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
; CHECK-LABEL: @cmp_ugt_v4i32(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <4 x i32> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
|
||||
;
|
||||
@ -139,7 +139,7 @@ define <4 x i32> @cmp_ugt_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
|
||||
define <4 x i32> @cmp_sge_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
; CHECK-LABEL: @cmp_sge_v4i32(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sge <4 x i32> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp sge <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
|
||||
;
|
||||
@ -149,7 +149,7 @@ define <4 x i32> @cmp_sge_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
|
||||
define <4 x i32> @cmp_uge_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
; CHECK-LABEL: @cmp_uge_v4i32(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge <4 x i32> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge <4 x i32> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
|
||||
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
|
||||
;
|
||||
@ -159,7 +159,7 @@ define <4 x i32> @cmp_uge_v4i32(<4 x i32> %a, <4 x i32> %b) {
|
||||
|
||||
define <8 x i16> @cmp_seq_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
; CHECK-LABEL: @cmp_seq_v8i16(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <8 x i16> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <8 x i16> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i16>
|
||||
; CHECK-NEXT: ret <8 x i16> [[TMP2]]
|
||||
;
|
||||
@ -169,7 +169,7 @@ define <8 x i16> @cmp_seq_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
|
||||
define <8 x i16> @cmp_ueq_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
; CHECK-LABEL: @cmp_ueq_v8i16(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <8 x i16> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <8 x i16> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i16>
|
||||
; CHECK-NEXT: ret <8 x i16> [[TMP2]]
|
||||
;
|
||||
@ -179,7 +179,7 @@ define <8 x i16> @cmp_ueq_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
|
||||
define <8 x i16> @cmp_sne_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
; CHECK-LABEL: @cmp_sne_v8i16(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <8 x i16> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <8 x i16> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i16>
|
||||
; CHECK-NEXT: ret <8 x i16> [[TMP2]]
|
||||
;
|
||||
@ -189,7 +189,7 @@ define <8 x i16> @cmp_sne_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
|
||||
define <8 x i16> @cmp_une_v8i16(<8 x i16> %a, <8 x i16> %b) {
|
||||
; CHECK-LABEL: @cmp_une_v8i16(
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <8 x i16> %a, %b
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <8 x i16> [[A:%.*]], [[B:%.*]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i1> [[TMP1]] to <8 x i16>
|
||||
; CHECK-NEXT: ret <8 x i16> [[TMP2]]
|
||||
;
|
||||
|
||||
@ -644,9 +644,10 @@ define i32* @gep_demanded_lane_undef(i32* %base, i64 %idx) {
|
||||
;; indices.
|
||||
define i32* @PR41624(<2 x { i32, i32 }*> %a) {
|
||||
; CHECK-LABEL: @PR41624(
|
||||
; CHECK-NEXT: %w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> <i64 5, i64 5>, <2 x i32> zeroinitializer
|
||||
; CHECK-NEXT: %r = extractelement <2 x i32*> %w, i32 0
|
||||
; CHECK-NEXT: ret i32* %r
|
||||
; CHECK-NEXT: [[W:%.*]] = getelementptr { i32, i32 }, <2 x { i32, i32 }*> [[A:%.*]], <2 x i64> <i64 5, i64 5>, <2 x i32> zeroinitializer
|
||||
; CHECK-NEXT: [[R:%.*]] = extractelement <2 x i32*> [[W]], i32 0
|
||||
; CHECK-NEXT: ret i32* [[R]]
|
||||
;
|
||||
%w = getelementptr { i32, i32 }, <2 x { i32, i32 }*> %a, <2 x i64> <i64 5, i64 5>, <2 x i32> zeroinitializer
|
||||
%r = extractelement <2 x i32*> %w, i32 0
|
||||
ret i32* %r
|
||||
|
||||
Loading…
Reference in New Issue
Block a user