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[X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX_L2 fields instead of the composite EVEX_LL field. Remove the EVEX_LL field. NFCI

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The composite existed to simplify some other tablegen code and not really in an
important way. Remove the combined field and just calculate the vector size
using two ifs.

llvm-svn: 357972
This commit is contained in:
Craig Topper 2019-04-09 07:40:14 +00:00
parent 62c248a7ea
commit 3db442c0ca
2 changed files with 9 additions and 36 deletions
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5
lib/Target/X86/X86InstrFormats.td
View File

@ -315,11 +315,8 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
bit hasEVEX_RC = 0; // Explicitly specified rounding control in FP instruction.
bit hasNoTrackPrefix = 0; // Does this inst has 0x3E (NoTrack) prefix?
bits<2> EVEX_LL;
let EVEX_LL{0} = hasVEX_L;
let EVEX_LL{1} = hasEVEX_L2;
// Vector size in bytes.
bits<7> VectSize = !shl(16, EVEX_LL);
bits<7> VectSize = !if(hasEVEX_L2, 64, !if(hasVEX_L, 32, 16));
// The scaling factor for AVX512's compressed displacement is either
// - the size of a power-of-two number of elements or

40
utils/TableGen/X86EVEX2VEXTablesEmitter.cpp
View File

@ -68,23 +68,6 @@ void X86EVEX2VEXTablesEmitter::printTable(const std::vector<Entry> &Table,
}
// Return true if the 2 BitsInits are equal
static inline bool equalBitsInits(const BitsInit *B1, const BitsInit *B2) {
if (B1->getNumBits() != B2->getNumBits())
PrintFatalError("Comparing two BitsInits with different sizes!");
for (unsigned i = 0, e = B1->getNumBits(); i != e; ++i) {
if (BitInit *Bit1 = dyn_cast<BitInit>(B1->getBit(i))) {
if (BitInit *Bit2 = dyn_cast<BitInit>(B2->getBit(i))) {
if (Bit1->getValue() != Bit2->getValue())
return false;
} else
PrintFatalError("Invalid BitsInit bit");
} else
PrintFatalError("Invalid BitsInit bit");
}
return true;
}
// Calculates the integer value residing BitsInit object
static inline uint64_t getValueFromBitsInit(const BitsInit *B) {
uint64_t Value = 0;
@ -119,8 +102,8 @@ public:
RecV->getValueAsDef("OpPrefix") != RecE->getValueAsDef("OpPrefix") ||
RecV->getValueAsDef("OpMap") != RecE->getValueAsDef("OpMap") ||
RecV->getValueAsBit("hasVEX_4V") != RecE->getValueAsBit("hasVEX_4V") ||
!equalBitsInits(RecV->getValueAsBitsInit("EVEX_LL"),
RecE->getValueAsBitsInit("EVEX_LL")) ||
RecV->getValueAsBit("hasEVEX_L2") != RecE->getValueAsBit("hasEVEX_L2") ||
RecV->getValueAsBit("hasVEX_L") != RecE->getValueAsBit("hasVEX_L") ||
// Match is allowed if either is VEX_WIG, or they match, or EVEX
// is VEX_W1X and VEX is VEX_W0.
(!(VEX_WIG || (!EVEX_WIG && EVEX_W == VEX_W) ||
@ -150,8 +133,9 @@ public:
} else if (isMemoryOperand(OpRec1) && isMemoryOperand(OpRec2)) {
return false;
} else if (isImmediateOperand(OpRec1) && isImmediateOperand(OpRec2)) {
if (OpRec1->getValueAsDef("Type") != OpRec2->getValueAsDef("Type"))
if (OpRec1->getValueAsDef("Type") != OpRec2->getValueAsDef("Type")) {
return false;
}
} else
return false;
}
@ -207,8 +191,7 @@ void X86EVEX2VEXTablesEmitter::run(raw_ostream &OS) {
else if (Inst->TheDef->getValueAsDef("OpEnc")->getName() == "EncEVEX" &&
!Inst->TheDef->getValueAsBit("hasEVEX_K") &&
!Inst->TheDef->getValueAsBit("hasEVEX_B") &&
getValueFromBitsInit(Inst->TheDef->
getValueAsBitsInit("EVEX_LL")) != 2 &&
!Inst->TheDef->getValueAsBit("hasEVEX_L2") &&
!Inst->TheDef->getValueAsBit("notEVEX2VEXConvertible"))
EVEXInsts.push_back(Inst);
}
@ -236,17 +219,10 @@ void X86EVEX2VEXTablesEmitter::run(raw_ostream &OS) {
continue;
// In case a match is found add new entry to the appropriate table
switch (getValueFromBitsInit(
EVEXInst->TheDef->getValueAsBitsInit("EVEX_LL"))) {
case 0:
EVEX2VEX128.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,0}
break;
case 1:
if (EVEXInst->TheDef->getValueAsBit("hasVEX_L"))
EVEX2VEX256.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,1}
break;
default:
llvm_unreachable("Instruction's size not fit for the mapping!");
}
else
EVEX2VEX128.push_back(std::make_pair(EVEXInst, VEXInst)); // {0,0}
}
// Print both tables