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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00

look up instructions by record, not by name.

llvm-svn: 98904
This commit is contained in:
Chris Lattner 2010-03-19 00:07:20 +00:00
parent 938747fc7f
commit 3e5af02a79
7 changed files with 17 additions and 8 deletions

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@ -156,7 +156,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();
CodeGenInstruction &CGI = Target.getInstruction(InstName);
CodeGenInstruction &CGI = Target.getInstruction(R);
// Loop over all of the fields in the instruction, determining which are the
// operands to the instruction.

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@ -1141,7 +1141,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
"Only supports zero or one result instrs!");
CodeGenInstruction &InstInfo =
CDP.getTargetInfo().getInstruction(getOperator()->getName());
CDP.getTargetInfo().getInstruction(getOperator());
EEVT::TypeSet ResultType;
@ -2083,7 +2083,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
std::vector<Record*> Results;
std::vector<Record*> Operands;
CodeGenInstruction &InstInfo =Target.getInstruction(Instrs[i]->getName());
CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]);
if (InstInfo.OperandList.size() != 0) {
if (InstInfo.NumDefs == 0) {
@ -2150,7 +2150,7 @@ void CodeGenDAGPatterns::ParseInstructions() {
// Parse the operands list from the (ops) list, validating it.
assert(I->getArgList().empty() && "Args list should still be empty here!");
CodeGenInstruction &CGI = Target.getInstruction(Instrs[i]->getName());
CodeGenInstruction &CGI = Target.getInstruction(Instrs[i]);
// Check that all of the results occur first in the list.
std::vector<Record*> Results;

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@ -138,6 +138,12 @@ Record *CodeGenTarget::getInstructionSet() const {
return TargetRec->getValueAsDef("InstructionSet");
}
CodeGenInstruction &CodeGenTarget::getInstruction(const Record *InstRec) const {
return getInstruction(InstRec->getName());
}
/// getAsmParser - Return the AssemblyParser definition for this target.
///
Record *CodeGenTarget::getAsmParser() const {

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@ -193,12 +193,15 @@ public:
if (Instructions.empty()) ReadInstructions();
return Instructions;
}
private:
CodeGenInstruction &getInstruction(const std::string &Name) const {
const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
assert(Insts.count(Name) && "Not an instruction!");
return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
}
public:
CodeGenInstruction &getInstruction(const Record *InstRec) const;
typedef std::map<std::string,
CodeGenInstruction>::const_iterator inst_iterator;

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@ -75,7 +75,7 @@ static unsigned getResultPatternCost(TreePatternNode *P,
Record *Op = P->getOperator();
if (Op->isSubClassOf("Instruction")) {
Cost++;
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName());
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
if (II.usesCustomInserter)
Cost += 10;
}

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@ -627,7 +627,7 @@ EmitResultInstructionAsOperand(const TreePatternNode *N,
SmallVectorImpl<unsigned> &OutputOps) {
Record *Op = N->getOperator();
const CodeGenTarget &CGT = CGP.getTargetInfo();
CodeGenInstruction &II = CGT.getInstruction(Op->getName());
CodeGenInstruction &II = CGT.getInstruction(Op);
const DAGInstruction &Inst = CGP.getInstruction(Op);
// If we can, get the pattern for the instruction we're generating. We derive

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@ -254,7 +254,7 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
Record *Op = Dst->getOperator();
if (!Op->isSubClassOf("Instruction"))
continue;
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName());
CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
if (II.OperandList.empty())
continue;