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Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss".

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llvm-svn: 139686
This commit is contained in:
Bruno Cardoso Lopes 2011-09-14 02:36:14 +00:00
parent a7b727b0bf
commit 3e6b9661d1
2 changed files with 17 additions and 1 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -6348,7 +6348,9 @@ SDValue getMOVLP(SDValue &Op, DebugLoc &dl, SelectionDAG &DAG, bool HasSSE2) {
// matching to x86 specific nodes. Note that for the 1st condition all
// types are matched with movsd.
if (HasSSE2) {
if (NumElems == 2)
// FIXME: isMOVLMask should be checked and matched before getMOVLP,
// as to remove this logic from here, as much as possible
if (NumElems == 2 || !X86::isMOVLMask(SVOp))
return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG);
return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG);
}

14
test/CodeGen/X86/vec_shuffle-38.ll
View File

@ -43,3 +43,17 @@ entry:
%shuffle = shufflevector <4 x float> %vecin1, <4 x float> %vecin2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
ret <4 x float> %shuffle
}
; rdar://10119696
; CHECK: f
define <4 x float> @f(<4 x float> %x, double* nocapture %y) nounwind uwtable readonly ssp {
entry:
; CHECK: movsd (%
; CHECK-NEXT: movsd %xmm
%u110.i = load double* %y, align 1
%tmp8.i = insertelement <2 x double> undef, double %u110.i, i32 0
%tmp9.i = bitcast <2 x double> %tmp8.i to <4 x float>
%shuffle.i = shufflevector <4 x float> %x, <4 x float> %tmp9.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
ret <4 x float> %shuffle.i
}