RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
Code Issues Projects Releases Wiki Activity

[AMDGPU] Use std::make_tuple to make some toolchains happy again

Browse Source 
My toolchain stopped working (LLVM 8.0 , libstdc++ 5.4.0) after
r372338.

The same problem was seen in clang-cuda-build buildbots:

clang-cuda-build/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:763:12:
error: chosen constructor is explicit in copy-initialization
    return {Reg, 0, nullptr};
           ^~~~~~~~~~~~~~~~~
/usr/bin/../lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/c++/5.4.0/tuple:479:19:
note: explicit constructor declared here
        constexpr tuple(_UElements&&... __elements)
                  ^

This commit adds explicit calls to std::make_tuple to work around
the problem.

llvm-svn: 372384
This commit is contained in:
Bjorn Pettersson 2019-09-20 12:13:12 +00:00
parent 066f8201bb
commit 3e704d00dd
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
View File

@ -760,7 +760,7 @@ static std::tuple<Register, unsigned, MachineInstr *>
getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) {
MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); MachineInstr *Def = getDefIgnoringCopies(Reg, MRI);
if (!Def) if (!Def)
return {Reg, 0, nullptr}; return std::make_tuple(Reg, 0, nullptr);
if (Def->getOpcode() == AMDGPU::G_CONSTANT) { if (Def->getOpcode() == AMDGPU::G_CONSTANT) {
unsigned Offset; unsigned Offset;
@ -770,21 +770,21 @@ getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) {
else else
Offset = Op.getCImm()->getZExtValue(); Offset = Op.getCImm()->getZExtValue();
return {Register(), Offset, Def}; return std::make_tuple(Register(), Offset, Def);
} }
int64_t Offset; int64_t Offset;
if (Def->getOpcode() == AMDGPU::G_ADD) { if (Def->getOpcode() == AMDGPU::G_ADD) {
// TODO: Handle G_OR used for add case // TODO: Handle G_OR used for add case
if (mi_match(Def->getOperand(1).getReg(), MRI, m_ICst(Offset))) if (mi_match(Def->getOperand(1).getReg(), MRI, m_ICst(Offset)))
return {Def->getOperand(0).getReg(), Offset, Def}; return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def);
// FIXME: matcher should ignore copies // FIXME: matcher should ignore copies
if (mi_match(Def->getOperand(1).getReg(), MRI, m_Copy(m_ICst(Offset)))) if (mi_match(Def->getOperand(1).getReg(), MRI, m_Copy(m_ICst(Offset))))
return {Def->getOperand(0).getReg(), Offset, Def}; return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def);
} }
return {Reg, 0, Def}; return std::make_tuple(Reg, 0, Def);
} }
static unsigned getBufferStoreOpcode(LLT Ty, static unsigned getBufferStoreOpcode(LLT Ty,
@ -931,7 +931,7 @@ AMDGPUInstructionSelector::splitBufferOffsets(MachineIRBuilder &B,
B.setInsertPt(OldMBB, OldInsPt); B.setInsertPt(OldMBB, OldInsPt);
} }
return {BaseReg, ImmOffset, TotalConstOffset}; return std::make_tuple(BaseReg, ImmOffset, TotalConstOffset);
} }
bool AMDGPUInstructionSelector::selectStoreIntrinsic(MachineInstr &MI, bool AMDGPUInstructionSelector::selectStoreIntrinsic(MachineInstr &MI,