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Restore fixed version of "[CodeGenPrepare] Fix isIVIncrement (PR49466)"
Change was reverted in commit 8d20f2c2c66eb486ff23cc3d55a53bd840b36971 because it was causing an infinite loop. 9228f2f32 fixed the root issue in the code structure, this change just reapplies the original change w/adaptation to the new code structure.
This commit is contained in:
Philip Reames
parent
44498cb737
commit
3ea5a04801
@ -1332,7 +1332,7 @@ getIVIncrement(const PHINode *PN, const LoopInfo *LI) {
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return None;
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auto *IVInc =
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dyn_cast<Instruction>(PN->getIncomingValueForBlock(L->getLoopLatch()));
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if (!IVInc)
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if (!IVInc || LI->getLoopFor(IVInc->getParent()) != L)
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return None;
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Instruction *LHS = nullptr;
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Constant *Step = nullptr;
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@ -1363,6 +1363,7 @@ bool CodeGenPrepare::replaceMathCmpWithIntrinsic(BinaryOperator *BO,
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if (!isIVIncrement(BO, LI))
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return false;
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const Loop *L = LI->getLoopFor(BO->getParent());
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assert(L && "L should not be null after isIVIncrement()");
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// Do not risk on moving increment into a child loop.
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if (LI->getLoopFor(Cmp->getParent()) != L)
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return false;
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192
test/CodeGen/X86/pr49466.ll
Normal file
192
test/CodeGen/X86/pr49466.ll
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@ -0,0 +1,192 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -O2 -codegenprepare -S | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@b = dso_local local_unnamed_addr global i64 0, align 8
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@c = dso_local local_unnamed_addr global i64 0, align 8
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@d = dso_local local_unnamed_addr global i64 0, align 8
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@e = dso_local local_unnamed_addr global i64 0, align 8
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@f = dso_local local_unnamed_addr global i64 0, align 8
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@g = dso_local local_unnamed_addr global i64 0, align 8
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define dso_local i32 @m() local_unnamed_addr {
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; CHECK-LABEL: @m(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @f, align 8
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; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* @c, align 8
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; CHECK-NEXT: [[CONV18:%.*]] = trunc i64 [[TMP1]] to i32
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; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* @d, align 8
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; CHECK-NEXT: [[CONV43:%.*]] = trunc i64 [[TMP2]] to i8
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[J_0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[J_1_LCSSA:%.*]], [[FOR_COND39_PREHEADER:%.*]] ]
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; CHECK-NEXT: [[P_0:%.*]] = phi i64 [ undef, [[ENTRY]] ], [ [[P_1_LCSSA:%.*]], [[FOR_COND39_PREHEADER]] ]
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; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[I_1_LCSSA:%.*]], [[FOR_COND39_PREHEADER]] ]
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; CHECK-NEXT: [[CMP73:%.*]] = icmp slt i32 [[I_0]], 3
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; CHECK-NEXT: br i1 [[CMP73]], label [[FOR_BODY:%.*]], label [[FOR_COND39_PREHEADER]]
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; CHECK: for.cond1.loopexit:
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[CONV18]], 3
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; CHECK-NEXT: br i1 [[TMP3]], label [[FOR_BODY]], label [[FOR_COND39_PREHEADER]]
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; CHECK: for.cond39.preheader:
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; CHECK-NEXT: [[J_1_LCSSA]] = phi i32 [ [[J_0]], [[FOR_COND]] ], [ [[CONV18]], [[FOR_COND1_LOOPEXIT:%.*]] ]
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; CHECK-NEXT: [[P_1_LCSSA]] = phi i64 [ [[P_0]], [[FOR_COND]] ], [ 0, [[FOR_COND1_LOOPEXIT]] ]
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; CHECK-NEXT: [[I_1_LCSSA]] = phi i32 [ [[I_0]], [[FOR_COND]] ], [ [[CONV18]], [[FOR_COND1_LOOPEXIT]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i8 [[CONV43]], 0
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; CHECK-NEXT: br i1 [[TMP4]], label [[FOR_COND]], label [[FOR_INC42:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[L_176:%.*]] = phi i8 [ [[SUB:%.*]], [[FOR_COND1_LOOPEXIT]] ], [ 0, [[FOR_COND]] ]
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; CHECK-NEXT: [[P_175:%.*]] = phi i64 [ 0, [[FOR_COND1_LOOPEXIT]] ], [ [[P_0]], [[FOR_COND]] ]
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; CHECK-NEXT: [[J_174:%.*]] = phi i32 [ [[CONV18]], [[FOR_COND1_LOOPEXIT]] ], [ [[J_0]], [[FOR_COND]] ]
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[J_174]], 0
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; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[CLEANUP45:%.*]], label [[FOR_COND2_PREHEADER:%.*]]
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; CHECK: for.cond2.preheader:
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; CHECK-NEXT: [[DOTPR_PRE:%.*]] = load i64, i64* @e, align 8
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; CHECK-NEXT: switch i64 [[P_175]], label [[FOR_BODY4_PREHEADER6:%.*]] [
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; CHECK-NEXT: i64 -1, label [[FOR_END12:%.*]]
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; CHECK-NEXT: i64 -2, label [[FOR_END12]]
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; CHECK-NEXT: i64 -3, label [[FOR_END12]]
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; CHECK-NEXT: i64 -4, label [[FOR_END12]]
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; CHECK-NEXT: i64 -5, label [[FOR_END12]]
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; CHECK-NEXT: i64 -6, label [[FOR_END12]]
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; CHECK-NEXT: i64 -7, label [[FOR_END12]]
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; CHECK-NEXT: i64 0, label [[FOR_END12]]
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; CHECK-NEXT: ]
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; CHECK: for.body4.preheader6:
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; CHECK-NEXT: [[TMP5:%.*]] = sub i64 0, [[P_175]]
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; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP5]], 7
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; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[P_175]], [[XTRAITER]]
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; CHECK-NEXT: br label [[FOR_BODY4:%.*]]
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; CHECK: for.body4:
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; CHECK-NEXT: [[P_270:%.*]] = phi i64 [ [[INC11_7:%.*]], [[FOR_BODY4]] ], [ [[TMP6]], [[FOR_BODY4_PREHEADER6]] ]
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; CHECK-NEXT: [[INC11_7]] = add i64 [[P_270]], 8
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; CHECK-NEXT: [[TOBOOL3_NOT_7:%.*]] = icmp eq i64 [[INC11_7]], 0
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; CHECK-NEXT: br i1 [[TOBOOL3_NOT_7]], label [[FOR_END12]], label [[FOR_BODY4]]
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; CHECK: for.end12:
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; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP0]] to i32*
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; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
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; CHECK-NEXT: [[CONV23:%.*]] = zext i32 [[TMP8]] to i64
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; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* @b, align 8
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; CHECK-NEXT: [[DIV24:%.*]] = udiv i64 [[TMP9]], [[CONV23]]
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; CHECK-NEXT: store i64 [[DIV24]], i64* @b, align 8
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; CHECK-NEXT: [[SUB]] = add i8 [[L_176]], -1
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; CHECK-NEXT: [[TOBOOL32_NOT72:%.*]] = icmp eq i64 [[DOTPR_PRE]], 0
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; CHECK-NEXT: br i1 [[TOBOOL32_NOT72]], label [[FOR_COND1_LOOPEXIT]], label [[FOR_INC34_PREHEADER:%.*]]
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; CHECK: for.inc34.preheader:
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; CHECK-NEXT: store i64 0, i64* @e, align 8
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; CHECK-NEXT: br label [[FOR_COND1_LOOPEXIT]]
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; CHECK: for.inc42:
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; CHECK-NEXT: br label [[FOR_INC42]]
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; CHECK: cleanup45:
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; CHECK-NEXT: [[CMP13:%.*]] = icmp ne i8 [[L_176]], 0
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; CHECK-NEXT: [[CONV16:%.*]] = zext i1 [[CMP13]] to i32
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; CHECK-NEXT: ret i32 [[CONV16]]
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;
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entry:
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%0 = load i64, i64* @f, align 8
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%1 = inttoptr i64 %0 to i32*
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%2 = load i64, i64* @c, align 8
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%conv18 = trunc i64 %2 to i32
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%cmp = icmp slt i32 %conv18, 3
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%3 = load i64, i64* @d, align 8
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%conv43 = trunc i64 %3 to i8
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%tobool40.not = icmp eq i8 %conv43, 0
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br label %for.cond
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for.cond: ; preds = %for.cond39.preheader, %entry
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%j.0 = phi i32 [ undef, %entry ], [ %j.1.lcssa, %for.cond39.preheader ]
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%p.0 = phi i64 [ undef, %entry ], [ %p.1.lcssa, %for.cond39.preheader ]
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%i.0 = phi i32 [ undef, %entry ], [ %i.1.lcssa, %for.cond39.preheader ]
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%cmp73 = icmp slt i32 %i.0, 3
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br i1 %cmp73, label %for.body.preheader, label %for.cond39.preheader
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for.body.preheader: ; preds = %for.cond
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br label %for.body
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for.cond1.loopexit: ; preds = %for.inc34.preheader, %for.end12
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br i1 %cmp, label %for.body, label %for.cond39.preheader.loopexit
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for.cond39.preheader.loopexit: ; preds = %for.cond1.loopexit
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br label %for.cond39.preheader
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for.cond39.preheader: ; preds = %for.cond39.preheader.loopexit, %for.cond
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%j.1.lcssa = phi i32 [ %j.0, %for.cond ], [ %conv18, %for.cond39.preheader.loopexit ]
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%p.1.lcssa = phi i64 [ %p.0, %for.cond ], [ 0, %for.cond39.preheader.loopexit ]
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%i.1.lcssa = phi i32 [ %i.0, %for.cond ], [ %conv18, %for.cond39.preheader.loopexit ]
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br i1 %tobool40.not, label %for.cond, label %for.inc42.preheader
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for.inc42.preheader: ; preds = %for.cond39.preheader
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br label %for.inc42
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for.body: ; preds = %for.body.preheader, %for.cond1.loopexit
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%l.176 = phi i8 [ %sub, %for.cond1.loopexit ], [ 0, %for.body.preheader ]
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%p.175 = phi i64 [ 0, %for.cond1.loopexit ], [ %p.0, %for.body.preheader ]
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%j.174 = phi i32 [ %conv18, %for.cond1.loopexit ], [ %j.0, %for.body.preheader ]
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%tobool.not = icmp eq i32 %j.174, 0
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br i1 %tobool.not, label %cleanup45, label %for.cond2.preheader
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for.cond2.preheader: ; preds = %for.body
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%tobool3.not69 = icmp eq i64 %p.175, 0
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%.pr.pre = load i64, i64* @e, align 8
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br i1 %tobool3.not69, label %for.end12, label %for.body4.preheader
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for.body4.preheader: ; preds = %for.cond2.preheader
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%4 = sub i64 0, %p.175
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%xtraiter = and i64 %4, 7
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%lcmp.mod.not = icmp eq i64 %xtraiter, 0
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br i1 %lcmp.mod.not, label %for.body4.prol.loopexit, label %for.body4.prol.preheader
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for.body4.prol.preheader: ; preds = %for.body4.preheader
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%5 = mul nsw i64 %xtraiter, -1
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br label %for.body4.prol
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for.body4.prol: ; preds = %for.body4.prol.preheader, %for.body4.prol
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%lsr.iv = phi i64 [ 0, %for.body4.prol.preheader ], [ %lsr.iv.next, %for.body4.prol ]
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%lsr.iv.next = add nsw i64 %lsr.iv, -1
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%prol.iter.cmp.not = icmp eq i64 %5, %lsr.iv.next
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br i1 %prol.iter.cmp.not, label %for.body4.prol.loopexit.loopexit, label %for.body4.prol
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for.body4.prol.loopexit.loopexit: ; preds = %for.body4.prol
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%6 = sub i64 %p.175, %lsr.iv.next
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br label %for.body4.prol.loopexit
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for.body4.prol.loopexit: ; preds = %for.body4.prol.loopexit.loopexit, %for.body4.preheader
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%p.270.unr = phi i64 [ %p.175, %for.body4.preheader ], [ %6, %for.body4.prol.loopexit.loopexit ]
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%7 = icmp ugt i64 %p.175, -8
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br i1 %7, label %for.end12, label %for.body4.preheader89
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for.body4.preheader89: ; preds = %for.body4.prol.loopexit
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br label %for.body4
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for.body4: ; preds = %for.body4.preheader89, %for.body4
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%p.270 = phi i64 [ %inc11.7, %for.body4 ], [ %p.270.unr, %for.body4.preheader89 ]
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%inc11.7 = add i64 %p.270, 8
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%tobool3.not.7 = icmp eq i64 %inc11.7, 0
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br i1 %tobool3.not.7, label %for.end12.loopexit, label %for.body4
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for.end12.loopexit: ; preds = %for.body4
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br label %for.end12
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for.end12: ; preds = %for.end12.loopexit, %for.body4.prol.loopexit, %for.cond2.preheader
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%8 = load i32, i32* %1, align 4
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%conv23 = zext i32 %8 to i64
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%9 = load i64, i64* @b, align 8
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%div24 = udiv i64 %9, %conv23
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store i64 %div24, i64* @b, align 8
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%sub = add i8 %l.176, -1
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%tobool32.not72 = icmp eq i64 %.pr.pre, 0
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br i1 %tobool32.not72, label %for.cond1.loopexit, label %for.inc34.preheader
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for.inc34.preheader: ; preds = %for.end12
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store i64 0, i64* @e, align 8
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br label %for.cond1.loopexit
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for.inc42: ; preds = %for.inc42.preheader, %for.inc42
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br label %for.inc42
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cleanup45: ; preds = %for.body
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%cmp13 = icmp ne i8 %l.176, 0
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%conv16 = zext i1 %cmp13 to i32
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ret i32 %conv16
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}
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