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Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill markers to physreg uses. llvm-svn: 103784
This commit is contained in:
Jakob Stoklund Olesen
parent
dc05cdd475
commit
3eac02b22f
@ -135,9 +135,10 @@ namespace {
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LiveRegMap::iterator i, bool isKill);
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void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned VirtReg, bool isKill);
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void killPhysReg(unsigned PhysReg);
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void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned PhysReg, bool isKill);
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void usePhysReg(MachineOperand&);
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void definePhysReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned PhysReg, RegState NewState);
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LiveRegMap::iterator assignVirtToPhysReg(unsigned VirtReg,
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unsigned PhysReg);
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LiveRegMap::iterator allocVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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@ -146,8 +147,6 @@ namespace {
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unsigned OpNum, unsigned VirtReg, unsigned Hint);
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unsigned reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned OpNum, unsigned VirtReg, unsigned Hint);
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void reservePhysReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned PhysReg);
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void spillAll(MachineBasicBlock &MBB, MachineInstr *MI);
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void setPhysReg(MachineOperand &MO, unsigned PhysReg);
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};
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@ -264,75 +263,106 @@ void RAFast::spillAll(MachineBasicBlock &MBB, MachineInstr *MI) {
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spillVirtReg(MBB, MI, Dirty[i], false);
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}
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/// killPhysReg - Kill any virtual register aliased by PhysReg.
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void RAFast::killPhysReg(unsigned PhysReg) {
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// Fast path for the normal case.
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switch (unsigned VirtReg = PhysRegState[PhysReg]) {
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/// usePhysReg - Handle the direct use of a physical register.
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/// Check that the register is not used by a virtreg.
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/// Kill the physreg, marking it free.
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/// This may add implicit kills to MO->getParent() and invalidate MO.
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void RAFast::usePhysReg(MachineOperand &MO) {
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unsigned PhysReg = MO.getReg();
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assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
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"Bad usePhysReg operand");
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switch (PhysRegState[PhysReg]) {
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case regDisabled:
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break;
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case regFree:
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return;
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case regReserved:
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PhysRegState[PhysReg] = regFree;
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// Fall through
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case regFree:
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UsedInInstr.set(PhysReg);
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MO.setIsKill();
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return;
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default:
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killVirtReg(VirtReg);
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return;
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// The physreg was allocated to a virtual register. That means to value we
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// wanted has been clobbered.
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llvm_unreachable("Instruction uses an allocated register");
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}
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// This is a disabled register, we have to check aliases.
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// Maybe a superregister is reserved?
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for (const unsigned *AS = TRI->getAliasSet(PhysReg);
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unsigned Alias = *AS; ++AS) {
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switch (unsigned VirtReg = PhysRegState[Alias]) {
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switch (PhysRegState[Alias]) {
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case regDisabled:
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case regFree:
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break;
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case regReserved:
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assert(TRI->isSuperRegister(PhysReg, Alias) &&
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"Instruction is not using a subregister of a reserved register");
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// Leave the superregister in the working set.
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PhysRegState[Alias] = regFree;
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UsedInInstr.set(Alias);
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MO.getParent()->addRegisterKilled(Alias, TRI, true);
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return;
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case regFree:
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if (TRI->isSuperRegister(PhysReg, Alias)) {
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// Leave the superregister in the working set.
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UsedInInstr.set(Alias);
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MO.getParent()->addRegisterKilled(Alias, TRI, true);
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return;
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}
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// Some other alias was in the working set - clear it.
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PhysRegState[Alias] = regDisabled;
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break;
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default:
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killVirtReg(VirtReg);
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break;
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llvm_unreachable("Instruction uses an alias of an allocated register");
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}
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}
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// All aliases are disabled, bring register into working set.
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PhysRegState[PhysReg] = regFree;
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UsedInInstr.set(PhysReg);
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MO.setIsKill();
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}
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/// spillPhysReg - Spill any dirty virtual registers that aliases PhysReg. If
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/// isKill is set, they are also killed.
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void RAFast::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned PhysReg, bool isKill) {
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/// definePhysReg - Mark PhysReg as reserved or free after spilling any
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/// virtregs. This is very similar to defineVirtReg except the physreg is
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/// reserved instead of allocated.
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void RAFast::definePhysReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned PhysReg, RegState NewState) {
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UsedInInstr.set(PhysReg);
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switch (unsigned VirtReg = PhysRegState[PhysReg]) {
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case regDisabled:
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break;
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case regFree:
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return;
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case regReserved:
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if (isKill)
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PhysRegState[PhysReg] = regFree;
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return;
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default:
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spillVirtReg(MBB, MI, VirtReg, isKill);
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spillVirtReg(MBB, MI, VirtReg, true);
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// Fall through.
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case regFree:
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case regReserved:
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PhysRegState[PhysReg] = NewState;
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return;
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}
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// This is a disabled register, we have to check aliases.
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// This is a disabled register, disable all aliases.
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PhysRegState[PhysReg] = NewState;
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for (const unsigned *AS = TRI->getAliasSet(PhysReg);
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unsigned Alias = *AS; ++AS) {
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UsedInInstr.set(Alias);
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switch (unsigned VirtReg = PhysRegState[Alias]) {
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case regDisabled:
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case regFree:
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break;
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case regReserved:
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if (isKill)
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PhysRegState[Alias] = regFree;
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break;
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default:
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spillVirtReg(MBB, MI, VirtReg, isKill);
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spillVirtReg(MBB, MI, VirtReg, true);
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// Fall through.
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case regFree:
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case regReserved:
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PhysRegState[Alias] = regDisabled;
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if (TRI->isSuperRegister(PhysReg, Alias))
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return;
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break;
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}
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}
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}
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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@ -538,47 +568,6 @@ unsigned RAFast::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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return LR.PhysReg;
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}
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/// reservePhysReg - Mark PhysReg as reserved. This is very similar to
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/// defineVirtReg except the physreg is reserved instead of allocated.
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void RAFast::reservePhysReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned PhysReg) {
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UsedInInstr.set(PhysReg);
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switch (unsigned VirtReg = PhysRegState[PhysReg]) {
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case regDisabled:
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break;
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case regFree:
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PhysRegState[PhysReg] = regReserved;
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return;
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case regReserved:
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return;
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default:
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spillVirtReg(MBB, MI, VirtReg, true);
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PhysRegState[PhysReg] = regReserved;
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return;
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}
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// This is a disabled register, disable all aliases.
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for (const unsigned *AS = TRI->getAliasSet(PhysReg);
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unsigned Alias = *AS; ++AS) {
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UsedInInstr.set(Alias);
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switch (unsigned VirtReg = PhysRegState[Alias]) {
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case regDisabled:
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case regFree:
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break;
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case regReserved:
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// is a super register already reserved?
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if (TRI->isSuperRegister(PhysReg, Alias))
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return;
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break;
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default:
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spillVirtReg(MBB, MI, VirtReg, true);
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break;
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}
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PhysRegState[Alias] = regDisabled;
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}
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PhysRegState[PhysReg] = regReserved;
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}
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// setPhysReg - Change MO the refer the PhysReg, considering subregs.
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void RAFast::setPhysReg(MachineOperand &MO, unsigned PhysReg) {
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if (unsigned Idx = MO.getSubReg()) {
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@ -600,9 +589,9 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// Add live-in registers as live.
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for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
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E = MBB.livein_end(); I != E; ++I)
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reservePhysReg(MBB, MII, *I);
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definePhysReg(MBB, MII, *I, regReserved);
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SmallVector<unsigned, 8> VirtKills, PhysKills, PhysDefs;
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SmallVector<unsigned, 8> VirtKills, PhysDefs;
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SmallVector<MachineInstr*, 32> Coalesced;
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// Otherwise, sequentially allocate each instruction in the MBB.
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@ -670,7 +659,6 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// First scan.
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// Mark physreg uses and early clobbers as used.
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// Collect PhysKills.
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg()) continue;
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@ -678,25 +666,14 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg) ||
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ReservedRegs.test(Reg)) continue;
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if (MO.isUse()) {
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#ifndef NDEBUG
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// We are using a physreg directly. It had better not be clobbered by a
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// virtreg.
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assert(PhysRegState[Reg] <= regReserved && "Using clobbered physreg");
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if (PhysRegState[Reg] == regDisabled)
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for (const unsigned *AS = TRI->getAliasSet(Reg);
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unsigned Alias = *AS; ++AS)
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assert(PhysRegState[Alias] <= regReserved &&
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"Physreg alias was clobbered");
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#endif
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PhysKills.push_back(Reg); // Any clean physreg use is a kill.
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UsedInInstr.set(Reg);
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usePhysReg(MO);
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} else if (MO.isEarlyClobber()) {
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spillPhysReg(MBB, MI, Reg, true);
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UsedInInstr.set(Reg);
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definePhysReg(MBB, MI, Reg, MO.isDead() ? regFree : regReserved);
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PhysDefs.push_back(Reg);
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}
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}
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// Second scan.
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// Allocate virtreg uses and early clobbers.
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// Collect VirtKills
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@ -723,11 +700,6 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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killVirtReg(VirtKills[i]);
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VirtKills.clear();
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// Process physreg kills
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for (unsigned i = 0, e = PhysKills.size(); i != e; ++i)
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killPhysReg(PhysKills[i]);
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PhysKills.clear();
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MRI->addPhysRegsUsed(UsedInInstr);
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// Track registers defined by instruction - early clobbers at this point.
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@ -749,12 +721,8 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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if (ReservedRegs.test(Reg)) continue;
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if (MO.isImplicit())
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spillPhysReg(MBB, MI, Reg, true);
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else
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reservePhysReg(MBB, MI, Reg);
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if (MO.isDead())
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PhysKills.push_back(Reg);
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definePhysReg(MBB, MI, Reg, (MO.isImplicit() || MO.isDead()) ?
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regFree : regReserved);
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continue;
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}
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unsigned PhysReg = defineVirtReg(MBB, MI, i, Reg, CopySrc);
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@ -777,11 +745,6 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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killVirtReg(VirtKills[i]);
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VirtKills.clear();
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// Process physreg deads.
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for (unsigned i = 0, e = PhysKills.size(); i != e; ++i)
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killPhysReg(PhysKills[i]);
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PhysKills.clear();
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MRI->addPhysRegsUsed(UsedInInstr);
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if (CopyDst && CopyDst == CopySrc && CopyDstSub == CopySrcSub) {
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@ -1,6 +1,6 @@
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; RUN: llc < %s -march=x86 | grep "#%ebp %esi %edi 8(%edx) %eax (%ebx)"
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; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)"
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; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ecx %ebx %edx 8(%edi) %eax (%esi)"
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; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)"
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; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers
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; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
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