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AMDGPU: Analyze mubuf with immediate soffset
Fixes giving up on clustering common addr64 accesses with constant 0 soffset. llvm-svn: 287018
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@ -265,7 +265,8 @@ bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg,
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}
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if (isMUBUF(LdSt) || isMTBUF(LdSt)) {
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if (AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::soffset) != -1)
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const MachineOperand *SOffset = getNamedOperand(LdSt, AMDGPU::OpName::soffset);
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if (SOffset && SOffset->isReg())
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return false;
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const MachineOperand *AddrReg =
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@ -277,6 +278,10 @@ bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg,
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getNamedOperand(LdSt, AMDGPU::OpName::offset);
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BaseReg = AddrReg->getReg();
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Offset = OffsetImm->getImm();
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if (SOffset) // soffset can be an inline immediate.
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Offset += SOffset->getImm();
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return true;
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}
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@ -3,6 +3,7 @@
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declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
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declare void @llvm.amdgcn.s.barrier() #1
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declare i32 @llvm.amdgcn.workitem.id.x() #2
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@stored_lds_ptr = addrspace(3) global i32 addrspace(3)* undef, align 4
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@ -205,6 +206,38 @@ define void @reorder_global_offsets(i32 addrspace(1)* nocapture %out, i32 addrsp
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ret void
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}
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; FUNC-LABEL: {{^}}reorder_global_offsets_addr64_soffset0:
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64{{$}}
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:20{{$}}
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; GCN: buffer_load_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:12{{$}}
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; GCN: buffer_load_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:28{{$}}
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; GCN: buffer_load_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:44{{$}}
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:36{{$}}
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; GCN: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} 0 addr64 offset:52{{$}}
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define void @reorder_global_offsets_addr64_soffset0(i32 addrspace(1)* noalias nocapture %ptr.base) #0 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%id.ext = sext i32 %id to i64
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%ptr0 = getelementptr inbounds i32, i32 addrspace(1)* %ptr.base, i64 %id.ext
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%ptr1 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 3
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%ptr2 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 5
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%ptr3 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 7
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%ptr4 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 9
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%ptr5 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 11
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%ptr6 = getelementptr inbounds i32, i32 addrspace(1)* %ptr0, i32 13
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store i32 789, i32 addrspace(1)* %ptr0, align 4
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%tmp1 = load i32, i32 addrspace(1)* %ptr1, align 4
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store i32 123, i32 addrspace(1)* %ptr2, align 4
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%tmp2 = load i32, i32 addrspace(1)* %ptr3, align 4
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%add.0 = add nsw i32 %tmp1, %tmp2
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store i32 %add.0, i32 addrspace(1)* %ptr4, align 4
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%tmp3 = load i32, i32 addrspace(1)* %ptr5, align 4
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%add.1 = add nsw i32 %add.0, %tmp3
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store i32 %add.1, i32 addrspace(1)* %ptr6, align 4
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ret void
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}
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; XFUNC-LABEL: @reorder_local_load_tbuffer_store_local_load
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; XCI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}}, 0x4
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; XCI: TBUFFER_STORE_FORMAT
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@ -232,3 +265,4 @@ define void @reorder_global_offsets(i32 addrspace(1)* nocapture %out, i32 addrsp
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attributes #0 = { nounwind }
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attributes #1 = { nounwind convergent }
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attributes #2 = { nounwind readnone }
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