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[llvm-mca] Constify the 'notify' routines. NFC.

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Also fixed up some whitespace formatting in DispatchStage.cpp.

llvm-svn: 343615
This commit is contained in:
Matt Davis 2018-10-02 18:26:33 +00:00
parent 4581267dc8
commit 3f9316b070
6 changed files with 18 additions and 16 deletions
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2
tools/llvm-mca/include/Stages/DispatchStage.h
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@ -65,7 +65,7 @@ class DispatchStage final : public Stage {
void notifyInstructionDispatched(const InstRef &IR,
llvm::ArrayRef<unsigned> UsedPhysRegs,
unsigned uOps);
unsigned uOps) const;
void collectWrites(llvm::SmallVectorImpl<WriteRef> &Vec,
unsigned RegID) const {

10
tools/llvm-mca/include/Stages/ExecuteStage.h
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@ -61,13 +61,13 @@ public:
void notifyInstructionIssued(
const InstRef &IR,
llvm::ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used);
void notifyInstructionExecuted(const InstRef &IR);
void notifyInstructionReady(const InstRef &IR);
void notifyResourceAvailable(const ResourceRef &RR);
llvm::ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) const;
void notifyInstructionExecuted(const InstRef &IR) const;
void notifyInstructionReady(const InstRef &IR) const;
void notifyResourceAvailable(const ResourceRef &RR) const;
// Notify listeners that buffered resources have been consumed or freed.
void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved);
void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved) const;
};
} // namespace mca

2
tools/llvm-mca/include/Stages/RetireStage.h
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@ -38,7 +38,7 @@ public:
bool hasWorkToComplete() const override { return !RCU.isEmpty(); }
llvm::Error cycleStart() override;
llvm::Error execute(InstRef &IR) override;
void notifyInstructionRetired(const InstRef &IR);
void notifyInstructionRetired(const InstRef &IR) const;
};
} // namespace mca

7
tools/llvm-mca/lib/Stages/DispatchStage.cpp
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@ -29,7 +29,7 @@ namespace mca {
void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
ArrayRef<unsigned> UsedRegs,
unsigned UOps) {
unsigned UOps) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Dispatched: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionDispatchedEvent(IR, UsedRegs, UOps));
@ -115,7 +115,8 @@ Error DispatchStage::dispatch(InstRef IR) {
// to the instruction.
SmallVector<unsigned, 4> RegisterFiles(PRF.getNumRegisterFiles());
for (std::unique_ptr<WriteState> &WS : IS.getDefs())
PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), WS.get()), RegisterFiles);
PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), WS.get()),
RegisterFiles);
// Reserve slots in the RCU, and notify the instruction that it has been
// dispatched to the schedulers for execution.
@ -138,7 +139,7 @@ Error DispatchStage::cycleStart() {
unsigned DispatchedOpcodes = DispatchWidth - AvailableEntries;
CarryOver -= DispatchedOpcodes;
assert(CarriedOver.isValid() && "Invalid dispatched instruction");
SmallVector<unsigned, 8> RegisterFiles(PRF.getNumRegisterFiles(), 0U);
notifyInstructionDispatched(CarriedOver, RegisterFiles, DispatchedOpcodes);
if (!CarryOver)

11
tools/llvm-mca/lib/Stages/ExecuteStage.cpp
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@ -136,19 +136,19 @@ Error ExecuteStage::execute(InstRef &IR) {
return issueInstruction(IR);
}
void ExecuteStage::notifyInstructionExecuted(const InstRef &IR) {
void ExecuteStage::notifyInstructionExecuted(const InstRef &IR) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Executed: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionEvent(HWInstructionEvent::Executed, IR));
}
void ExecuteStage::notifyInstructionReady(const InstRef &IR) {
void ExecuteStage::notifyInstructionReady(const InstRef &IR) const {
LLVM_DEBUG(dbgs() << "[E] Instruction Ready: #" << IR << '\n');
notifyEvent<HWInstructionEvent>(
HWInstructionEvent(HWInstructionEvent::Ready, IR));
}
void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) {
void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) const {
LLVM_DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.'
<< RR.second << "]\n");
for (HWEventListener *Listener : getListeners())
@ -156,7 +156,8 @@ void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) {
}
void ExecuteStage::notifyInstructionIssued(
const InstRef &IR, ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) {
const InstRef &IR,
ArrayRef<std::pair<ResourceRef, ResourceCycles>> Used) const {
LLVM_DEBUG({
dbgs() << "[E] Instruction Issued: #" << IR << '\n';
for (const std::pair<ResourceRef, ResourceCycles> &Resource : Used) {
@ -169,7 +170,7 @@ void ExecuteStage::notifyInstructionIssued(
}
void ExecuteStage::notifyReservedOrReleasedBuffers(const InstRef &IR,
bool Reserved) {
bool Reserved) const {
const InstrDesc &Desc = IR.getInstruction()->getDesc();
if (Desc.Buffers.empty())
return;

2
tools/llvm-mca/lib/Stages/RetireStage.cpp
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@ -47,7 +47,7 @@ llvm::Error RetireStage::execute(InstRef &IR) {
return llvm::ErrorSuccess();
}
void RetireStage::notifyInstructionRetired(const InstRef &IR) {
void RetireStage::notifyInstructionRetired(const InstRef &IR) const {
LLVM_DEBUG(llvm::dbgs() << "[E] Instruction Retired: #" << IR << '\n');
llvm::SmallVector<unsigned, 4> FreedRegs(PRF.getNumRegisterFiles());
const Instruction &Inst = *IR.getInstruction();