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Enable FISTTP* instructions when AVX is enabled.

llvm-svn: 147758
This commit is contained in:
Craig Topper 2012-01-08 23:04:21 +00:00
parent e1321329f4
commit 3fb8201fcb

View File

@ -439,31 +439,31 @@ def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">;
// FISTTP requires SSE3 even though it's a FPStack op.
def ISTT_Fp16m32 : FpI_<(outs), (ins i16mem:$op, RFP32:$src), OneArgFP,
[(X86fp_to_i16mem RFP32:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp32m32 : FpI_<(outs), (ins i32mem:$op, RFP32:$src), OneArgFP,
[(X86fp_to_i32mem RFP32:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp64m32 : FpI_<(outs), (ins i64mem:$op, RFP32:$src), OneArgFP,
[(X86fp_to_i64mem RFP32:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp16m64 : FpI_<(outs), (ins i16mem:$op, RFP64:$src), OneArgFP,
[(X86fp_to_i16mem RFP64:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp32m64 : FpI_<(outs), (ins i32mem:$op, RFP64:$src), OneArgFP,
[(X86fp_to_i32mem RFP64:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp64m64 : FpI_<(outs), (ins i64mem:$op, RFP64:$src), OneArgFP,
[(X86fp_to_i64mem RFP64:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp16m80 : FpI_<(outs), (ins i16mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i16mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp32m80 : FpI_<(outs), (ins i32mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i32mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
def ISTT_Fp64m80 : FpI_<(outs), (ins i64mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i64mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
Requires<[HasSSE3orAVX]>;
let mayStore = 1 in {
def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;