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https://github.com/RPCS3/llvm-mirror.git
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[WebAssembly] Support constant offsets on loads and stores
This is just prototype for load/store for i32 types. I'll add them to the rest of the types if we like this direction. Differential Revision: http://reviews.llvm.org/D15197 llvm-svn: 254807
This commit is contained in:
Derek Schuff
parent
730b7eb8e3
commit
3fcdebf45b
@ -25,59 +25,63 @@
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let Defs = [ARGUMENTS] in {
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// Basic load.
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def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (load I32:$addr))],
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"i32.load\t$dst, $addr">;
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def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (load I32:$addr))],
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"i64.load\t$dst, $addr">;
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def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr),
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[(set F32:$dst, (load I32:$addr))],
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"f32.load\t$dst, $addr">;
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def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr),
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[(set F64:$dst, (load I32:$addr))],
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"f64.load\t$dst, $addr">;
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def LOAD_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr), [],
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"i32.load\t$dst, $off($addr)">;
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def LOAD_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load\t$dst, $off($addr)">;
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def LOAD_F32 : I<(outs F32:$dst), (ins I32:$off, I32:$addr), [],
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"f32.load\t$dst, $off($addr)">;
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def LOAD_F64 : I<(outs F64:$dst), (ins I32:$off, I32:$addr), [],
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"f64.load\t$dst, $off($addr)">;
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// Extending load.
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def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (sextloadi8 I32:$addr))],
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"i32.load8_s\t$dst, $addr">;
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def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (zextloadi8 I32:$addr))],
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"i32.load8_u\t$dst, $addr">;
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def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (sextloadi16 I32:$addr))],
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"i32.load16_s\t$dst, $addr">;
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def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
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[(set I32:$dst, (zextloadi16 I32:$addr))],
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"i32.load16_u\t$dst, $addr">;
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def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (sextloadi8 I32:$addr))],
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"i64.load8_s\t$dst, $addr">;
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def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (zextloadi8 I32:$addr))],
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"i64.load8_u\t$dst, $addr">;
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def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (sextloadi16 I32:$addr))],
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"i64.load16_s\t$dst, $addr">;
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def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (zextloadi16 I32:$addr))],
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"i64.load16_u\t$dst, $addr">;
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def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (sextloadi32 I32:$addr))],
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"i64.load32_s\t$dst, $addr">;
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def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
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[(set I64:$dst, (zextloadi32 I32:$addr))],
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"i64.load32_u\t$dst, $addr">;
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def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr), [],
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"i32.load8_s\t$dst, $off($addr)">;
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def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr), [],
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"i32.load8_u\t$dst, $off($addr)">;
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def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr), [],
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"i32.load16_s\t$dst, $off($addr)">;
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def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr), [],
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"i32.load16_u\t$dst, $off($addr)">;
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def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load8_s\t$dst, $off($addr)">;
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def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load8_u\t$dst, $off($addr)">;
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def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load16_s\t$dst, $off($addr)">;
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def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load16_u\t$dst, $off($addr)">;
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def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load32_s\t$dst, $off($addr)">;
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def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr), [],
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"i64.load32_u\t$dst, $off($addr)">;
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} // Defs = [ARGUMENTS]
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// Select loads with no constant offset.
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def : Pat<(i32 (load I32:$addr)), (LOAD_I32 0, $addr)>;
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def : Pat<(i64 (load I32:$addr)), (LOAD_I64 0, $addr)>;
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def : Pat<(f32 (load I32:$addr)), (LOAD_F32 0, $addr)>;
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def : Pat<(f64 (load I32:$addr)), (LOAD_F64 0, $addr)>;
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// Select extending loads with no constant offset.
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def : Pat<(i32 (sextloadi8 I32:$addr)), (LOAD8_S_I32 0, $addr)>;
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def : Pat<(i32 (zextloadi8 I32:$addr)), (LOAD8_U_I32 0, $addr)>;
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def : Pat<(i32 (sextloadi16 I32:$addr)), (LOAD16_S_I32 0, $addr)>;
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def : Pat<(i32 (zextloadi16 I32:$addr)), (LOAD16_U_I32 0, $addr)>;
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def : Pat<(i64 (sextloadi8 I32:$addr)), (LOAD8_S_I64 0, $addr)>;
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def : Pat<(i64 (zextloadi8 I32:$addr)), (LOAD8_U_I64 0, $addr)>;
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def : Pat<(i64 (sextloadi16 I32:$addr)), (LOAD16_S_I64 0, $addr)>;
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def : Pat<(i64 (zextloadi16 I32:$addr)), (LOAD16_U_I64 0, $addr)>;
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def : Pat<(i64 (sextloadi32 I32:$addr)), (LOAD32_S_I64 0, $addr)>;
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def : Pat<(i64 (zextloadi32 I32:$addr)), (LOAD32_U_I64 0, $addr)>;
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// "Don't care" extending load become zero-extending load.
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def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 $addr)>;
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def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 $addr)>;
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def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD8_U_I64 $addr)>;
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def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 $addr)>;
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def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 $addr)>;
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def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 0, $addr)>;
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def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 0, $addr)>;
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def : Pat<(i64 (extloadi8 I32:$addr)), (LOAD8_U_I64 0, $addr)>;
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def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 0, $addr)>;
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def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 0, $addr)>;
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let Defs = [ARGUMENTS] in {
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@ -87,48 +91,55 @@ let Defs = [ARGUMENTS] in {
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// instruction definition patterns that don't reference all of the output
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// operands.
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// Note: WebAssembly inverts SelectionDAG's usual operand order.
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def STORE_I32 : I<(outs I32:$dst), (ins I32:$addr, I32:$val), [],
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"i32.store\t$dst, $addr, $val">;
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def STORE_I64 : I<(outs I64:$dst), (ins I32:$addr, I64:$val), [],
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"i64.store\t$dst, $addr, $val">;
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def STORE_F32 : I<(outs F32:$dst), (ins I32:$addr, F32:$val), [],
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"f32.store\t$dst, $addr, $val">;
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def STORE_F64 : I<(outs F64:$dst), (ins I32:$addr, F64:$val), [],
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"f64.store\t$dst, $addr, $val">;
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def STORE_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr, I32:$val), [],
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"i32.store\t$dst, $off($addr), $val">;
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def STORE_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr, I64:$val), [],
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"i64.store\t$dst, $off($addr), $val">;
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def STORE_F32 : I<(outs F32:$dst), (ins I32:$off, I32:$addr, F32:$val), [],
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"f32.store\t$dst, $off($addr), $val">;
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def STORE_F64 : I<(outs F64:$dst), (ins I32:$off, I32:$addr, F64:$val), [],
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"f64.store\t$dst, $off($addr), $val">;
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} // Defs = [ARGUMENTS]
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def : Pat<(store I32:$val, I32:$addr), (STORE_I32 I32:$addr, I32:$val)>;
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def : Pat<(store I64:$val, I32:$addr), (STORE_I64 I32:$addr, I64:$val)>;
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def : Pat<(store F32:$val, I32:$addr), (STORE_F32 I32:$addr, F32:$val)>;
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def : Pat<(store F64:$val, I32:$addr), (STORE_F64 I32:$addr, F64:$val)>;
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def : Pat<(store I32:$val, I32:$addr), (STORE_I32 0, I32:$addr, I32:$val)>;
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def : Pat<(store I64:$val, I32:$addr), (STORE_I64 0, I32:$addr, I64:$val)>;
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def : Pat<(store F32:$val, I32:$addr), (STORE_F32 0, I32:$addr, F32:$val)>;
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def : Pat<(store F64:$val, I32:$addr), (STORE_F64 0, I32:$addr, F64:$val)>;
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// FIXME: This pattern matches an immediate to actually use the offset field
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// in the store instruction; however only unsigned offsets are supported in
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// wasm, so we need to constrain the immediate we match. This may require
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// custom code rather than a simple pattern.
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// def : Pat<(store I32:$val, (add I32:$addr, (i32 imm:$off))),
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// (STORE_I32 imm:$off, I32:$addr, I32:$val)>;
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let Defs = [ARGUMENTS] in {
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// Truncating store.
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def STORE8_I32 : I<(outs I32:$dst), (ins I32:$addr, I32:$val), [],
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"i32.store8\t$dst, $addr, $val">;
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def STORE16_I32 : I<(outs I32:$dst), (ins I32:$addr, I32:$val), [],
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"i32.store16\t$dst, $addr, $val">;
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def STORE8_I64 : I<(outs I64:$dst), (ins I32:$addr, I64:$val), [],
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"i64.store8\t$dst, $addr, $val">;
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def STORE16_I64 : I<(outs I64:$dst), (ins I32:$addr, I64:$val), [],
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"i64.store16\t$dst, $addr, $val">;
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def STORE32_I64 : I<(outs I64:$dst), (ins I32:$addr, I64:$val), [],
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"i64.store32\t$dst, $addr, $val">;
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def STORE8_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr, I32:$val), [],
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"i32.store8\t$dst, $off($addr), $val">;
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def STORE16_I32 : I<(outs I32:$dst), (ins I32:$off, I32:$addr, I32:$val), [],
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"i32.store16\t$dst, $off($addr), $val">;
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def STORE8_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr, I64:$val), [],
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"i64.store8\t$dst, $off($addr), $val">;
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def STORE16_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr, I64:$val), [],
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"i64.store16\t$dst, $off($addr), $val">;
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def STORE32_I64 : I<(outs I64:$dst), (ins I32:$off, I32:$addr, I64:$val), [],
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"i64.store32\t$dst, $off($addr), $val">;
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} // Defs = [ARGUMENTS]
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def : Pat<(truncstorei8 I32:$val, I32:$addr),
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(STORE8_I32 I32:$addr, I32:$val)>;
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(STORE8_I32 0, I32:$addr, I32:$val)>;
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def : Pat<(truncstorei16 I32:$val, I32:$addr),
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(STORE16_I32 I32:$addr, I32:$val)>;
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(STORE16_I32 0, I32:$addr, I32:$val)>;
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def : Pat<(truncstorei8 I64:$val, I32:$addr),
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(STORE8_I64 I32:$addr, I64:$val)>;
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(STORE8_I64 0, I32:$addr, I64:$val)>;
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def : Pat<(truncstorei16 I64:$val, I32:$addr),
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(STORE16_I64 I32:$addr, I64:$val)>;
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(STORE16_I64 0, I32:$addr, I64:$val)>;
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def : Pat<(truncstorei32 I64:$val, I32:$addr),
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(STORE32_I64 I32:$addr, I64:$val)>;
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(STORE32_I64 0, I32:$addr, I64:$val)>;
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let Defs = [ARGUMENTS] in {
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@ -88,7 +88,7 @@ bool WebAssemblyStoreResults::runOnMachineFunction(MachineFunction &MF) {
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case WebAssembly::STORE_I32:
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case WebAssembly::STORE_I64:
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unsigned ToReg = MI.getOperand(0).getReg();
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unsigned FromReg = MI.getOperand(2).getReg();
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unsigned FromReg = MI.getOperand(3).getReg();
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for (auto I = MRI.use_begin(FromReg), E = MRI.use_end(); I != E;) {
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MachineOperand &O = *I++;
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MachineInstr *Where = O.getParent();
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@ -184,7 +184,7 @@ entry:
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; CHECK-LABEL: minimal_loop:
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; CHECK-NOT: br
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; CHECK: BB7_1:
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; CHECK: i32.store $discard=, $0, $pop{{[0-9]+}}{{$}}
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; CHECK: i32.store $discard=, 0($0), $pop{{[0-9]+}}{{$}}
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; CHECK: br BB7_1{{$}}
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; CHECK: BB7_2:
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define i32 @minimal_loop(i32* %p) {
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@ -11,7 +11,7 @@ target triple = "wasm32-unknown-unknown"
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; CHECK: foo:
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; CHECK: i32.const $push0=, answer{{$}}
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; CHECK-NEXT: i32.load $push1=, $pop0{{$}}
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; CHECK-NEXT: i32.load $push1=, 0($pop0){{$}}
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; CHECK-NEXT: return $pop1{{$}}
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define i32 @foo() {
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%a = load i32, i32* @answer
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@ -6,7 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: sext_i8_i32:
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; CHECK: i32.load8_s $push0=, $0{{$}}
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; CHECK: i32.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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@ -15,7 +15,7 @@ define i32 @sext_i8_i32(i8 *%p) {
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}
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; CHECK-LABEL: zext_i8_i32:
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; CHECK: i32.load8_u $push0=, $0{{$}}
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; CHECK: i32.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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@ -24,7 +24,7 @@ define i32 @zext_i8_i32(i8 *%p) {
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}
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; CHECK-LABEL: sext_i16_i32:
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; CHECK: i32.load16_s $push0=, $0{{$}}
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; CHECK: i32.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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@ -33,7 +33,7 @@ define i32 @sext_i16_i32(i16 *%p) {
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}
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; CHECK-LABEL: zext_i16_i32:
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; CHECK: i32.load16_u $push0=, $0{{$}}
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; CHECK: i32.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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@ -42,7 +42,7 @@ define i32 @zext_i16_i32(i16 *%p) {
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}
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; CHECK-LABEL: sext_i8_i64:
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; CHECK: i64.load8_s $push0=, $0{{$}}
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; CHECK: i64.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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@ -51,7 +51,7 @@ define i64 @sext_i8_i64(i8 *%p) {
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}
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; CHECK-LABEL: zext_i8_i64:
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; CHECK: i64.load8_u $push0=, $0{{$}}
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; CHECK: i64.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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@ -60,7 +60,7 @@ define i64 @zext_i8_i64(i8 *%p) {
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}
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; CHECK-LABEL: sext_i16_i64:
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; CHECK: i64.load16_s $push0=, $0{{$}}
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; CHECK: i64.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
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@ -69,7 +69,7 @@ define i64 @sext_i16_i64(i16 *%p) {
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}
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; CHECK-LABEL: zext_i16_i64:
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; CHECK: i64.load16_u $push0=, $0{{$}}
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; CHECK: i64.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
|
||||
@ -78,7 +78,7 @@ define i64 @zext_i16_i64(i16 *%p) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sext_i32_i64:
|
||||
; CHECK: i64.load32_s $push0=, $0{{$}}
|
||||
; CHECK: i64.load32_s $push0=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop0{{$}}
|
||||
define i64 @sext_i32_i64(i32 *%p) {
|
||||
%v = load i32, i32* %p
|
||||
@ -87,7 +87,7 @@ define i64 @sext_i32_i64(i32 *%p) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: zext_i32_i64:
|
||||
; CHECK: i64.load32_u $push0=, $0{{$}}
|
||||
; CHECK: i64.load32_u $push0=, 0($0){{$}}
|
||||
; CHECK: return $pop0{{$}}
|
||||
define i64 @zext_i32_i64(i32 *%p) {
|
||||
%v = load i32, i32* %p
|
||||
|
||||
@ -6,7 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
||||
target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: load_u_i1_i32:
|
||||
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, $0{{$}}
|
||||
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM0]]{{$}}
|
||||
define i32 @load_u_i1_i32(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
@ -15,7 +15,7 @@ define i32 @load_u_i1_i32(i1* %p) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: load_s_i1_i32:
|
||||
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, $0{{$}}
|
||||
; CHECK: i32.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: i32.const $[[NUM1:[0-9]+]]=, 31{{$}}
|
||||
; CHECK-NEXT: shl $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $[[NUM1]]{{$}}
|
||||
; CHECK-NEXT: shr_s $push[[NUM3:[0-9]+]]=, $pop[[NUM2]], $[[NUM1]]{{$}}
|
||||
@ -27,7 +27,7 @@ define i32 @load_s_i1_i32(i1* %p) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: load_u_i1_i64:
|
||||
; CHECK: i64.load8_u $push[[NUM0:[0-9]+]]=, $0{{$}}
|
||||
; CHECK: i64.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM0]]{{$}}
|
||||
define i64 @load_u_i1_i64(i1* %p) {
|
||||
%v = load i1, i1* %p
|
||||
@ -36,7 +36,7 @@ define i64 @load_u_i1_i64(i1* %p) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: load_s_i1_i64:
|
||||
; CHECK: i64.load8_u $push[[NUM0:[0-9]+]]=, $0{{$}}
|
||||
; CHECK: i64.load8_u $push[[NUM0:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: i64.const $[[NUM1:[0-9]+]]=, 63{{$}}
|
||||
; CHECK-NEXT: shl $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $[[NUM1]]{{$}}
|
||||
; CHECK-NEXT: shr_s $push[[NUM3:[0-9]+]]=, $pop[[NUM2]], $[[NUM1]]{{$}}
|
||||
@ -50,7 +50,7 @@ define i64 @load_s_i1_i64(i1* %p) {
|
||||
; CHECK-LABEL: store_i32_i1:
|
||||
; CHECK: i32.const $push[[NUM0:[0-9]+]]=, 1{{$}}
|
||||
; CHECK-NEXT: i32.and $push[[NUM1:[0-9]+]]=, $1, $pop[[NUM0]]{{$}}
|
||||
; CHECK-NEXT: i32.store8 $discard=, $0, $pop[[NUM1]]{{$}}
|
||||
; CHECK-NEXT: i32.store8 $discard=, 0($0), $pop[[NUM1]]{{$}}
|
||||
define void @store_i32_i1(i1* %p, i32 %v) {
|
||||
%t = trunc i32 %v to i1
|
||||
store i1 %t, i1* %p
|
||||
@ -60,7 +60,7 @@ define void @store_i32_i1(i1* %p, i32 %v) {
|
||||
; CHECK-LABEL: store_i64_i1:
|
||||
; CHECK: i64.const $push[[NUM0:[0-9]+]]=, 1{{$}}
|
||||
; CHECK-NEXT: i64.and $push[[NUM1:[0-9]+]]=, $1, $pop[[NUM0]]{{$}}
|
||||
; CHECK-NEXT: i64.store8 $discard=, $0, $pop[[NUM1]]{{$}}
|
||||
; CHECK-NEXT: i64.store8 $discard=, 0($0), $pop[[NUM1]]{{$}}
|
||||
define void @store_i64_i1(i1* %p, i64 %v) {
|
||||
%t = trunc i64 %v to i1
|
||||
store i1 %t, i1* %p
|
||||
|
||||
@ -8,7 +8,7 @@ target triple = "wasm32-unknown-unknown"
|
||||
; CHECK-LABEL: ldi32:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i32{{$}}
|
||||
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, $0{{$}}
|
||||
; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM]]{{$}}
|
||||
define i32 @ldi32(i32 *%p) {
|
||||
%v = load i32, i32* %p
|
||||
@ -18,7 +18,7 @@ define i32 @ldi32(i32 *%p) {
|
||||
; CHECK-LABEL: ldi64:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i64{{$}}
|
||||
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, $0{{$}}
|
||||
; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM]]{{$}}
|
||||
define i64 @ldi64(i64 *%p) {
|
||||
%v = load i64, i64* %p
|
||||
@ -28,7 +28,7 @@ define i64 @ldi64(i64 *%p) {
|
||||
; CHECK-LABEL: ldf32:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result f32{{$}}
|
||||
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, $0{{$}}
|
||||
; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM]]{{$}}
|
||||
define float @ldf32(float *%p) {
|
||||
%v = load float, float* %p
|
||||
@ -38,7 +38,7 @@ define float @ldf32(float *%p) {
|
||||
; CHECK-LABEL: ldf64:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result f64{{$}}
|
||||
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, $0{{$}}
|
||||
; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
|
||||
; CHECK-NEXT: return $pop[[NUM]]{{$}}
|
||||
define double @ldf64(double *%p) {
|
||||
%v = load double, double* %p
|
||||
|
||||
@ -9,7 +9,7 @@ target triple = "wasm32-unknown-unknown"
|
||||
; CHECK-LABEL: single_block:
|
||||
; CHECK-NOT: .local
|
||||
; CHECK: i32.const $push{{[0-9]+}}=, 0
|
||||
; CHECK: i32.store $push[[STORE:[0-9]+]]=, $0, $pop{{[0-9]+}}
|
||||
; CHECK: i32.store $push[[STORE:[0-9]+]]=, 0($0), $pop{{[0-9]+}}
|
||||
; CHECK: return $pop[[STORE]]{{$}}
|
||||
define i32 @single_block(i32* %p) {
|
||||
entry:
|
||||
@ -26,7 +26,7 @@ entry:
|
||||
@pos = global %class.Vec3 zeroinitializer, align 4
|
||||
|
||||
; CHECK-LABEL: foo:
|
||||
; CHECK: i32.store $discard=, $pop0, $0
|
||||
; CHECK: i32.store $discard=, 0($pop0), $0
|
||||
define void @foo() {
|
||||
for.body.i:
|
||||
br label %for.body5.i
|
||||
@ -44,7 +44,7 @@ for.cond.cleanup4.i:
|
||||
}
|
||||
|
||||
; CHECK-LABEL: bar:
|
||||
; CHECK: i32.store $discard=, $0, $pop0
|
||||
; CHECK: i32.store $discard=, 0($0), $pop0
|
||||
define void @bar() {
|
||||
for.body.i:
|
||||
br label %for.body5.i
|
||||
|
||||
@ -6,7 +6,7 @@ target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
||||
target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: trunc_i8_i32:
|
||||
; CHECK: i32.store8 $discard=, $0, $1{{$}}
|
||||
; CHECK: i32.store8 $discard=, 0($0), $1{{$}}
|
||||
define void @trunc_i8_i32(i8 *%p, i32 %v) {
|
||||
%t = trunc i32 %v to i8
|
||||
store i8 %t, i8* %p
|
||||
@ -14,7 +14,7 @@ define void @trunc_i8_i32(i8 *%p, i32 %v) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: trunc_i16_i32:
|
||||
; CHECK: i32.store16 $discard=, $0, $1{{$}}
|
||||
; CHECK: i32.store16 $discard=, 0($0), $1{{$}}
|
||||
define void @trunc_i16_i32(i16 *%p, i32 %v) {
|
||||
%t = trunc i32 %v to i16
|
||||
store i16 %t, i16* %p
|
||||
@ -22,7 +22,7 @@ define void @trunc_i16_i32(i16 *%p, i32 %v) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: trunc_i8_i64:
|
||||
; CHECK: i64.store8 $discard=, $0, $1{{$}}
|
||||
; CHECK: i64.store8 $discard=, 0($0), $1{{$}}
|
||||
define void @trunc_i8_i64(i8 *%p, i64 %v) {
|
||||
%t = trunc i64 %v to i8
|
||||
store i8 %t, i8* %p
|
||||
@ -30,7 +30,7 @@ define void @trunc_i8_i64(i8 *%p, i64 %v) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: trunc_i16_i64:
|
||||
; CHECK: i64.store16 $discard=, $0, $1{{$}}
|
||||
; CHECK: i64.store16 $discard=, 0($0), $1{{$}}
|
||||
define void @trunc_i16_i64(i16 *%p, i64 %v) {
|
||||
%t = trunc i64 %v to i16
|
||||
store i16 %t, i16* %p
|
||||
@ -38,7 +38,7 @@ define void @trunc_i16_i64(i16 *%p, i64 %v) {
|
||||
}
|
||||
|
||||
; CHECK-LABEL: trunc_i32_i64:
|
||||
; CHECK: i64.store32 $discard=, $0, $1{{$}}
|
||||
; CHECK: i64.store32 $discard=, 0($0), $1{{$}}
|
||||
define void @trunc_i32_i64(i32 *%p, i64 %v) {
|
||||
%t = trunc i64 %v to i32
|
||||
store i32 %t, i32* %p
|
||||
|
||||
@ -7,7 +7,7 @@ target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: sti32:
|
||||
; CHECK-NEXT: .param i32, i32{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, $0, $1{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, 0($0), $1{{$}}
|
||||
; CHECK-NEXT: return{{$}}
|
||||
define void @sti32(i32 *%p, i32 %v) {
|
||||
store i32 %v, i32* %p
|
||||
@ -16,7 +16,7 @@ define void @sti32(i32 *%p, i32 %v) {
|
||||
|
||||
; CHECK-LABEL: sti64:
|
||||
; CHECK-NEXT: .param i32, i64{{$}}
|
||||
; CHECK-NEXT: i64.store $discard=, $0, $1{{$}}
|
||||
; CHECK-NEXT: i64.store $discard=, 0($0), $1{{$}}
|
||||
; CHECK-NEXT: return{{$}}
|
||||
define void @sti64(i64 *%p, i64 %v) {
|
||||
store i64 %v, i64* %p
|
||||
@ -25,7 +25,7 @@ define void @sti64(i64 *%p, i64 %v) {
|
||||
|
||||
; CHECK-LABEL: stf32:
|
||||
; CHECK-NEXT: .param i32, f32{{$}}
|
||||
; CHECK-NEXT: f32.store $discard=, $0, $1{{$}}
|
||||
; CHECK-NEXT: f32.store $discard=, 0($0), $1{{$}}
|
||||
; CHECK-NEXT: return{{$}}
|
||||
define void @stf32(float *%p, float %v) {
|
||||
store float %v, float* %p
|
||||
@ -34,7 +34,7 @@ define void @stf32(float *%p, float %v) {
|
||||
|
||||
; CHECK-LABEL: stf64:
|
||||
; CHECK-NEXT: .param i32, f64{{$}}
|
||||
; CHECK-NEXT: f64.store $discard=, $0, $1{{$}}
|
||||
; CHECK-NEXT: f64.store $discard=, 0($0), $1{{$}}
|
||||
; CHECK-NEXT: return{{$}}
|
||||
define void @stf64(double *%p, double %v) {
|
||||
store double %v, double* %p
|
||||
|
||||
@ -32,8 +32,8 @@ entry:
|
||||
|
||||
; CHECK-LABEL: copy:
|
||||
; CHECK-NEXT: .param i32, i32{{$}}
|
||||
; CHECK-NEXT: i32.load $push0=, $1{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, $0, $pop0{{$}}
|
||||
; CHECK-NEXT: i32.load $push0=, 0($1){{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, 0($0), $pop0{{$}}
|
||||
; CHECK-NEXT: return{{$}}
|
||||
define void @copy(i8** %ap, i8** %bp) {
|
||||
entry:
|
||||
@ -49,11 +49,11 @@ entry:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i32{{$}}
|
||||
; CHECK-NEXT: .local i32{{$}}
|
||||
; CHECK-NEXT: i32.load $1=, $0{{$}}
|
||||
; CHECK-NEXT: i32.load $1=, 0($0){{$}}
|
||||
; CHECK-NEXT: i32.const $push0=, 4{{$}}
|
||||
; CHECK-NEXT: i32.add $push1=, $1, $pop0{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, $0, $pop1{{$}}
|
||||
; CHECK-NEXT: i32.load $push2=, $1{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, 0($0), $pop1{{$}}
|
||||
; CHECK-NEXT: i32.load $push2=, 0($1){{$}}
|
||||
; CHECK-NEXT: return $pop2{{$}}
|
||||
define i8 @arg_i8(i8** %ap) {
|
||||
entry:
|
||||
@ -67,15 +67,15 @@ entry:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i32{{$}}
|
||||
; CHECK-NEXT: .local i32{{$}}
|
||||
; CHECK-NEXT: i32.load $push0=, $0{{$}}
|
||||
; CHECK-NEXT: i32.load $push0=, 0($0){{$}}
|
||||
; CHECK-NEXT: i32.const $push1=, 3{{$}}
|
||||
; CHECK-NEXT: i32.add $push2=, $pop0, $pop1{{$}}
|
||||
; CHECK-NEXT: i32.const $push3=, -4{{$}}
|
||||
; CHECK-NEXT: i32.and $1=, $pop2, $pop3{{$}}
|
||||
; CHECK-NEXT: i32.const $push4=, 4{{$}}
|
||||
; CHECK-NEXT: i32.add $push5=, $1, $pop4{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, $0, $pop5{{$}}
|
||||
; CHECK-NEXT: i32.load $push6=, $1{{$}}
|
||||
; CHECK-NEXT: i32.store $discard=, 0($0), $pop5{{$}}
|
||||
; CHECK-NEXT: i32.load $push6=, 0($1){{$}}
|
||||
; CHECK-NEXT: return $pop6{{$}}
|
||||
define i32 @arg_i32(i8** %ap) {
|
||||
entry:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user