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Remove the NEON N2VSInt instruction class: it's only used in one place and
since it has no pattern, there's not much point in distinguishing an "N2VS" class for intrinsics anyway. llvm-svn: 96525
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@ -586,14 +586,7 @@ class N2VQ<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
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(ins QPR:$src), IIC_VUNAQ, OpcodeStr, Dt, "$dst, $src", "",
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[(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src))))]>;
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// Basic 2-register intrinsics: single-, double- and quad-register.
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class N2VSInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
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bits<2> op17_16, bits<5> op11_7, bit op4,
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InstrItinClass itin, string OpcodeStr, string Dt,
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ValueType ResTy, ValueType OpTy, Intrinsic IntOp>
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: N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4,
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(outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), itin,
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OpcodeStr, Dt, "$dst, $src", "", []>;
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// Basic 2-register intrinsics, both double- and quad-register.
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class N2VDInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
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bits<2> op17_16, bits<5> op11_7, bit op4,
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InstrItinClass itin, string OpcodeStr, string Dt,
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@ -3018,8 +3011,9 @@ def : N3VSPat<fmul, VMULfd_sfp>;
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// Vector Absolute used for single-precision FP
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let neverHasSideEffects = 1 in
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def VABSfd_sfp : N2VSInt<0b11, 0b11, 0b10, 0b01, 0b01110, 0, IIC_VUNAD,
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"vabs", "f32", v2f32, v2f32, int_arm_neon_vabs>;
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def VABSfd_sfp : N2V<0b11, 0b11, 0b10, 0b01, 0b01110, 0, 0,
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(outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), IIC_VUNAD,
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"vabs", "f32", "$dst, $src", "", []>;
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def : N2VSPat<fabs, f32, v2f32, VABSfd_sfp>;
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// Vector Negate used for single-precision FP
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