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[ARM][SchedModels] Convert IsR1P0AndLaterPred to MCSchedPredicate. NFC

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Differential revision: https://reviews.llvm.org/D90017
This commit is contained in:
Evgeny Leviant 2020-10-23 14:27:49 +03:00
parent 785022033e
commit 4038f285b5
1 changed files with 1 additions and 1 deletions
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2
lib/Target/ARM/ARMScheduleA57.td
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@ -26,7 +26,7 @@ def IsCPSRDefinedAndPredicatedPred :
MCSchedPredicate<IsCPSRDefinedAndPredicated>;
// Cortex A57 rev. r1p0 or later (false = r0px)
def IsR1P0AndLaterPred : SchedPredicate<[{false}]>;
def IsR1P0AndLaterPred : MCSchedPredicate<FalsePred>;
def IsLdrAm3RegOffPred : MCSchedPredicate<CheckInvalidRegOperand<2>>;
def IsLdrAm3RegOffPredX2 : MCSchedPredicate<CheckInvalidRegOperand<3>>;