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Only use clairvoyance when defining a register, and then only if it has one use.
This makes allocation independent on the ordering of use-def chains. llvm-svn: 103935
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@ -399,20 +399,6 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
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!Allocatable.test(Hint)))
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Hint = 0;
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// If there is no hint, peek at the first use of this register.
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if (!Hint && !MRI->use_nodbg_empty(VirtReg)) {
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MachineInstr &MI = *MRI->use_nodbg_begin(VirtReg);
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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// Copy to physreg -> use physreg as hint.
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if (TII->isMoveInstr(MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
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SrcReg == VirtReg && TargetRegisterInfo::isPhysicalRegister(DstReg) &&
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RC->contains(DstReg) && !UsedInInstr.test(DstReg) &&
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Allocatable.test(DstReg)) {
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Hint = DstReg;
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DEBUG(dbgs() << "%reg" << VirtReg << " gets hint from " << MI);
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}
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}
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// Take hint when possible.
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if (Hint) {
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assert(RC->contains(Hint) && !UsedInInstr.test(Hint) &&
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@ -543,9 +529,18 @@ RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
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bool New;
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tie(LRI, New) = LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg()));
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LiveReg &LR = LRI->second;
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if (New)
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if (New) {
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// If there is no hint, peek at the only use of this register.
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if ((!Hint || !TargetRegisterInfo::isPhysicalRegister(Hint)) &&
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MRI->hasOneNonDBGUse(VirtReg)) {
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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// It's a copy, use the destination register as a hint.
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if (TII->isMoveInstr(*MRI->use_nodbg_begin(VirtReg),
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SrcReg, DstReg, SrcSubReg, DstSubReg))
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Hint = DstReg;
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}
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allocVirtReg(MI, *LRI, Hint);
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else
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} else
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addKillFlag(LR); // Kill before redefine.
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assert(LR.PhysReg && "Register not assigned");
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LR.LastUse = MI;
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@ -1,15 +1,11 @@
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; RUN: llc < %s | FileCheck %s
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; RUN: llc < %s -regalloc=local | FileCheck -check-prefix=LOCAL %s
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; RUN: llc < %s -regalloc=fast | FileCheck -check-prefix=FAST %s
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; RUN: llc < %s -regalloc=local | FileCheck %s
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; RUN: llc < %s -regalloc=fast | FileCheck %s
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; The first argument of subfc must not be the same as any other register.
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; CHECK: subfc r3,r5,r4
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; CHECK: subfze r4,r6
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; LOCAL: subfc r6,r5,r4
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; LOCAL: subfze r3,r3
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; FAST: subfc r3,r5,r4
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; FAST: subfze r4,r6
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; CHECK: subfc [[REG:r.]],
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; CHECK-NOT: [[REG]]
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; CHECK: InlineAsm End
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; PR1357
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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