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[X86] Use MVT instead of EVT in some places. NFC

Prior to this the compiled code probably had extra checks for extended types that won't ever execute.

llvm-svn: 251682
This commit is contained in:
Craig Topper 2015-10-30 03:19:12 +00:00
parent 2d6739bc77
commit 4059955e80

View File

@ -1825,40 +1825,43 @@ EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &,
if (!VT.isVector())
return Subtarget->hasAVX512() ? MVT::i1: MVT::i8;
const unsigned NumElts = VT.getVectorNumElements();
const EVT EltVT = VT.getVectorElementType();
if (VT.is512BitVector()) {
if (Subtarget->hasAVX512())
if (EltVT == MVT::i32 || EltVT == MVT::i64 ||
EltVT == MVT::f32 || EltVT == MVT::f64)
switch(NumElts) {
case 8: return MVT::v8i1;
case 16: return MVT::v16i1;
}
if (Subtarget->hasBWI())
if (EltVT == MVT::i8 || EltVT == MVT::i16)
switch(NumElts) {
case 32: return MVT::v32i1;
case 64: return MVT::v64i1;
}
}
if (VT.isSimple()) {
MVT VVT = VT.getSimpleVT();
const unsigned NumElts = VVT.getVectorNumElements();
const MVT EltVT = VVT.getVectorElementType();
if (VVT.is512BitVector()) {
if (Subtarget->hasAVX512())
if (EltVT == MVT::i32 || EltVT == MVT::i64 ||
EltVT == MVT::f32 || EltVT == MVT::f64)
switch(NumElts) {
case 8: return MVT::v8i1;
case 16: return MVT::v16i1;
}
if (Subtarget->hasBWI())
if (EltVT == MVT::i8 || EltVT == MVT::i16)
switch(NumElts) {
case 32: return MVT::v32i1;
case 64: return MVT::v64i1;
}
}
if (VT.is256BitVector() || VT.is128BitVector()) {
if (Subtarget->hasVLX())
if (EltVT == MVT::i32 || EltVT == MVT::i64 ||
EltVT == MVT::f32 || EltVT == MVT::f64)
switch(NumElts) {
case 2: return MVT::v2i1;
case 4: return MVT::v4i1;
case 8: return MVT::v8i1;
}
if (Subtarget->hasBWI() && Subtarget->hasVLX())
if (EltVT == MVT::i8 || EltVT == MVT::i16)
switch(NumElts) {
case 8: return MVT::v8i1;
case 16: return MVT::v16i1;
case 32: return MVT::v32i1;
}
if (VVT.is256BitVector() || VVT.is128BitVector()) {
if (Subtarget->hasVLX())
if (EltVT == MVT::i32 || EltVT == MVT::i64 ||
EltVT == MVT::f32 || EltVT == MVT::f64)
switch(NumElts) {
case 2: return MVT::v2i1;
case 4: return MVT::v4i1;
case 8: return MVT::v8i1;
}
if (Subtarget->hasBWI() && Subtarget->hasVLX())
if (EltVT == MVT::i8 || EltVT == MVT::i16)
switch(NumElts) {
case 8: return MVT::v8i1;
case 16: return MVT::v16i1;
case 32: return MVT::v32i1;
}
}
}
return VT.changeVectorElementTypeToInteger();
@ -14432,7 +14435,7 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget *Subtarget,
// Since SSE has no unsigned integer comparisons, we need to flip the sign
// bits of the inputs before performing those operations.
if (FlipSigns) {
EVT EltVT = VT.getVectorElementType();
MVT EltVT = VT.getVectorElementType();
SDValue SB = DAG.getConstant(APInt::getSignBit(EltVT.getSizeInBits()), dl,
VT);
Op0 = DAG.getNode(ISD::XOR, dl, VT, Op0, SB);
@ -18233,7 +18236,7 @@ static SDValue LowerScalarVariableShift(SDValue Op, SelectionDAG &DAG,
if (SupportedVectorShiftWithBaseAmnt(VT, Subtarget, Op.getOpcode())) {
SDValue BaseShAmt;
EVT EltVT = VT.getVectorElementType();
MVT EltVT = VT.getVectorElementType();
if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Amt)) {
// Check if this build_vector node is doing a splat.
@ -19096,7 +19099,7 @@ static SDValue LowerBITCAST(SDValue Op, const X86Subtarget *Subtarget,
SDValue InVec = Op->getOperand(0);
SDLoc dl(Op);
unsigned NumElts = SrcVT.getVectorNumElements();
EVT SVT = SrcVT.getVectorElementType();
MVT SVT = SrcVT.getVectorElementType();
// Widen the vector in input in the case of MVT::v2i32.
// Example: from MVT::v2i32 to MVT::v4i32.
@ -24404,7 +24407,8 @@ static SDValue performShiftToAllZeros(SDNode *N, SelectionDAG &DAG,
if (auto *AmtBV = dyn_cast<BuildVectorSDNode>(Amt))
if (auto *AmtSplat = AmtBV->getConstantSplatNode()) {
APInt ShiftAmt = AmtSplat->getAPIntValue();
unsigned MaxAmount = VT.getVectorElementType().getSizeInBits();
unsigned MaxAmount =
VT.getSimpleVT().getVectorElementType().getSizeInBits();
// SSE2/AVX2 logical shifts always return a vector of 0s
// if the shift amount is bigger than or equal to