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Allow more tailcall optimization: calls with inputs that are all passed in registers.
llvm-svn: 94873
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5acba193ef
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@ -2258,9 +2258,18 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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return true;
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return true;
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// Look for obvious safe cases to perform tail call optimization.
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// Look for obvious safe cases to perform tail call optimization.
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// For now, only consider callees which take no arguments.
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// If the callee takes no arguments then go on to check the results of the
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if (!Outs.empty())
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// call.
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return false;
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if (!Outs.empty()) {
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// Check if stack adjustment is needed. For now, do not do this if any
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// argument is passed on the stack.
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CalleeCC, isVarArg, getTargetMachine(),
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ArgLocs, *DAG.getContext());
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CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CalleeCC));
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if (CCInfo.getNextStackOffset())
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return false;
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}
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// If the caller does not return a value, then this is obviously safe.
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// If the caller does not return a value, then this is obviously safe.
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// This is one case where it's safe to perform this optimization even
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// This is one case where it's safe to perform this optimization even
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@ -5,7 +5,7 @@ define void @bar(i32 %b, i32 %a) nounwind optsize ssp {
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entry:
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entry:
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; CHECK: leal 15(%rsi), %edi
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; CHECK: leal 15(%rsi), %edi
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; CHECK-NOT: movl
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; CHECK-NOT: movl
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; CHECK: callq _foo
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; CHECK: jmp _foo
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%0 = add i32 %a, 15 ; <i32> [#uses=1]
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%0 = add i32 %a, 15 ; <i32> [#uses=1]
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%1 = zext i32 %0 to i64 ; <i64> [#uses=1]
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%1 = zext i32 %0 to i64 ; <i64> [#uses=1]
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tail call void @foo(i64 %1) nounwind
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tail call void @foo(i64 %1) nounwind
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@ -1,10 +1,13 @@
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; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s
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; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s -check-prefix=32
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; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s
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; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s -check-prefix=64
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define void @t1(i32 %x) nounwind ssp {
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define void @t1(i32 %x) nounwind ssp {
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entry:
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entry:
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; CHECK: t1:
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; 32: t1:
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; CHECK: jmp {{_?}}foo
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; 32: jmp {{_?}}foo
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; 64: t1:
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; 64: jmp {{_?}}foo
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tail call void @foo() nounwind
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tail call void @foo() nounwind
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ret void
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ret void
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}
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}
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@ -13,8 +16,11 @@ declare void @foo()
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define void @t2() nounwind ssp {
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define void @t2() nounwind ssp {
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entry:
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entry:
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; CHECK: t2:
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; 32: t2:
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; CHECK: jmp {{_?}}foo2
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; 32: jmp {{_?}}foo2
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; 64: t2:
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; 64: jmp {{_?}}foo2
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%0 = tail call i32 @foo2() nounwind
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%0 = tail call i32 @foo2() nounwind
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ret void
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ret void
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}
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}
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@ -23,10 +29,39 @@ declare i32 @foo2()
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define void @t3() nounwind ssp {
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define void @t3() nounwind ssp {
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entry:
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entry:
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; CHECK: t3:
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; 32: t3:
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; CHECK: jmp {{_?}}foo3
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; 32: jmp {{_?}}foo3
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; 64: t3:
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; 64: jmp {{_?}}foo3
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%0 = tail call i32 @foo3() nounwind
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%0 = tail call i32 @foo3() nounwind
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ret void
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ret void
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}
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}
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declare i32 @foo3()
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declare i32 @foo3()
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define void @t4(void (i32)* nocapture %x) nounwind ssp {
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entry:
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; 32: t4:
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; 32: call *
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; FIXME: gcc can generate a tailcall for this. But it's tricky.
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; 64: t4:
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; 64-NOT: call
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; 64: jmpq *
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tail call void %x(i32 0) nounwind
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ret void
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}
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define void @t5(void ()* nocapture %x) nounwind ssp {
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entry:
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; 32: t5:
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; 32-NOT: call
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; 32: jmpl *
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; 64: t5:
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; 64-NOT: call
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; 64: jmpq *
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tail call void %x() nounwind
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ret void
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}
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