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[SLP]Fix possible crash on unreachable incoming values sorting.

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The incoming values for PHI nodes may come from unreachable BasicBlocks,
need to handle this case.

Differential Revision: https://reviews.llvm.org/D106264
This commit is contained in:
Alexey Bataev 2021-07-19 04:18:27 -07:00
parent a1b9277190
commit 40b6951dda
2 changed files with 30 additions and 2 deletions
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6
lib/Transforms/Vectorize/SLPVectorizer.cpp
View File

@ -8440,8 +8440,10 @@ bool SLPVectorizerPass::vectorizeChainsInBlock(BasicBlock *BB, BoUpSLP &R) {
if (auto *I2 = dyn_cast<Instruction>(Opcodes2[I])) {
DomTreeNodeBase<BasicBlock> *NodeI1 = DT->getNode(I1->getParent());
DomTreeNodeBase<BasicBlock> *NodeI2 = DT->getNode(I2->getParent());
assert(NodeI1 && "Should only process reachable instructions");
assert(NodeI2 && "Should only process reachable instructions");
if (!NodeI1)
return NodeI2 != nullptr;
if (!NodeI2)
return false;
assert((NodeI1 == NodeI2) ==
(NodeI1->getDFSNumIn() == NodeI2->getDFSNumIn()) &&
"Different nodes should have different DFS numbers");

26
test/Transforms/SLPVectorizer/X86/unreachable.ll
View File

@ -62,3 +62,29 @@ bb2:
ret void
}
define void @bar() {
; CHECK-LABEL: @bar(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = load atomic i8*, i8** undef unordered, align 8
; CHECK-NEXT: br label [[BB6:%.*]]
; CHECK: bb5:
; CHECK-NEXT: [[TMP4:%.*]] = load atomic i8*, i8** undef unordered, align 8
; CHECK-NEXT: br label [[BB6]]
; CHECK: bb6:
; CHECK-NEXT: [[TMP7:%.*]] = phi i8* [ [[TMP]], [[BB5:%.*]] ], [ undef, [[BB:%.*]] ]
; CHECK-NEXT: [[TMP8:%.*]] = phi i8* [ [[TMP4]], [[BB5]] ], [ undef, [[BB]] ]
; CHECK-NEXT: ret void
;
bb:
%tmp = load atomic i8*, i8** undef unordered, align 8
br label %bb6
bb5: ; No predecessors!
%tmp4 = load atomic i8*, i8** undef unordered, align 8
br label %bb6
bb6: ; preds = %bb5, %bb
%tmp7 = phi i8* [ %tmp, %bb5 ], [ undef, %bb ]
%tmp8 = phi i8* [ %tmp4, %bb5 ], [ undef, %bb ]
ret void
}