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[WebAssembly] Don't expand divisions by constants.

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Don't expand divisions by constants if it would require multiple instructions.
The current assumption is that engines will perform the desired optimizations.

llvm-svn: 269930
This commit is contained in:
Dan Gohman 2016-05-18 14:29:42 +00:00
parent 6583fe41bb
commit 40e6be6120
3 changed files with 69 additions and 0 deletions
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6
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
View File

@ -243,6 +243,12 @@ bool WebAssemblyTargetLowering::allowsMisalignedMemoryAccesses(
return true;
}
bool WebAssemblyTargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const {
// The current thinking is that wasm engines will perform this optimization,
// so we can save on code size.
return true;
}
//===----------------------------------------------------------------------===//
// WebAssembly Lowering private implementation.
//===----------------------------------------------------------------------===//

1
lib/Target/WebAssembly/WebAssemblyISelLowering.h
View File

@ -58,6 +58,7 @@ class WebAssemblyTargetLowering final : public TargetLowering {
unsigned AS) const override;
bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align,
bool *Fast) const override;
bool isIntDivCheap(EVT VT, AttributeSet Attr) const override;
SDValue LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const override;

62
test/CodeGen/WebAssembly/divrem-constant.ll Normal file
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@ -0,0 +1,62 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that integer div and rem by constant are optimized appropriately.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: test_udiv_2:
; CHECK: i32.shr_u
define i32 @test_udiv_2(i32 %x) {
%t = udiv i32 %x, 2
ret i32 %t
}
; CHECK-LABEL: test_udiv_5:
; CHECK: i32.div_u
define i32 @test_udiv_5(i32 %x) {
%t = udiv i32 %x, 5
ret i32 %t
}
; CHECK-LABEL: test_sdiv_2:
; CHECK: i32.div_s
define i32 @test_sdiv_2(i32 %x) {
%t = sdiv i32 %x, 2
ret i32 %t
}
; CHECK-LABEL: test_sdiv_5:
; CHECK: i32.div_s
define i32 @test_sdiv_5(i32 %x) {
%t = sdiv i32 %x, 5
ret i32 %t
}
; CHECK-LABEL: test_urem_2:
; CHECK: i32.and
define i32 @test_urem_2(i32 %x) {
%t = urem i32 %x, 2
ret i32 %t
}
; CHECK-LABEL: test_urem_5:
; CHECK: i32.rem_u
define i32 @test_urem_5(i32 %x) {
%t = urem i32 %x, 5
ret i32 %t
}
; CHECK-LABEL: test_srem_2:
; CHECK: i32.rem_s
define i32 @test_srem_2(i32 %x) {
%t = srem i32 %x, 2
ret i32 %t
}
; CHECK-LABEL: test_srem_5:
; CHECK: i32.rem_s
define i32 @test_srem_5(i32 %x) {
%t = srem i32 %x, 5
ret i32 %t
}