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Teach x86 fast-isel to use AVX opcodes for vector stores when AVX is enabled.
llvm-svn: 186496
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ade122d371
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418481460c
@ -264,24 +264,24 @@ X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg,
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break;
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case MVT::v4f32:
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if (Aligned)
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Opc = X86::MOVAPSmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVAPSmr : X86::MOVAPSmr;
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else
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Opc = X86::MOVUPSmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr;
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break;
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case MVT::v2f64:
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if (Aligned)
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Opc = X86::MOVAPSmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVAPSmr : X86::MOVAPSmr;
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else
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Opc = X86::MOVUPSmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr;
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break;
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case MVT::v4i32:
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case MVT::v2i64:
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case MVT::v8i16:
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case MVT::v16i8:
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if (Aligned)
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Opc = X86::MOVDQAmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVDQAmr : X86::MOVDQAmr;
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else
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Opc = X86::MOVDQUmr;
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Opc = Subtarget->hasAVX() ? X86::VMOVDQUmr : X86::MOVDQUmr;
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break;
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}
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