RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Code Issues Projects Releases Wiki Activity

Widening cleanup

Browse Source 
llvm-svn: 58796
This commit is contained in:
Mon P Wang 2008-11-06 05:31:54 +00:00
parent 078361bddc
commit 41f90a3ee5
4 changed files with 22 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -100,9 +100,9 @@ class VISIBILITY_HIDDEN SelectionDAGLegalize {
/// processed to the result.
std::map<SDValue, SDValue> ScalarizedNodes;
/// WidenNodes - For nodes that need to be widen from one vector type to
/// another, this contains the mapping of ones we have already widen. This
/// allows us to avoid widening more than once.
/// WidenNodes - For nodes that need to be widened from one vector type to
/// another, this contains the mapping of those that we have already widen.
/// This allows us to avoid widening more than once.
std::map<SDValue, SDValue> WidenNodes;
void AddLegalizedOperand(SDValue From, SDValue To) {
@ -117,7 +117,7 @@ class VISIBILITY_HIDDEN SelectionDAGLegalize {
// If someone requests legalization of the new node, return itself.
LegalizedNodes.insert(std::make_pair(To, To));
}
void AddWidenOperand(SDValue From, SDValue To) {
void AddWidenedOperand(SDValue From, SDValue To) {
bool isNew = WidenNodes.insert(std::make_pair(From, To)).second;
assert(isNew && "Got into the map somehow?");
// If someone requests legalization of the new node, return itself.
@ -180,13 +180,12 @@ private:
/// types.
void ExpandOp(SDValue O, SDValue &Lo, SDValue &Hi);
/// WidenVectorOp - Widen a vector operation in order to do the computation
/// in a wider type given to a wider type given by WidenVT (e.g., v3i32 to
/// v4i32). The produced value will have the correct value for the existing
/// elements but no guarantee is made about the new elements at the end of
/// the vector: it may be zero, sign-extended, or garbage. This is useful
/// when we have instruction operating on an illegal vector type and we want
/// to widen it to do the computation on a legal wider vector type.
/// WidenVectorOp - Widen a vector operation to a wider type given by WidenVT
/// (e.g., v3i32 to v4i32). The produced value will have the correct value
/// for the existing elements but no guarantee is made about the new elements
/// at the end of the vector: it may be zero, ones, or garbage. This is useful
/// when we have an instruction operating on an illegal vector type and we
/// want to widen it to do the computation on a legal wider vector type.
SDValue WidenVectorOp(SDValue Op, MVT WidenVT);
/// SplitVectorOp - Given an operand of vector type, break it down into
@ -198,7 +197,7 @@ private:
/// scalar (e.g. f32) value.
SDValue ScalarizeVectorOp(SDValue O);
/// Useful 16 element vector used to pass operands for widening
/// Useful 16 element vector type that is used to pass operands for widening.
typedef SmallVector<SDValue, 16> SDValueVector;
/// LoadWidenVectorOp - Load a vector for a wider type. Returns true if
@ -7583,8 +7582,7 @@ SDValue SelectionDAGLegalize::WidenVectorOp(SDValue Op, MVT WidenVT) {
// the legal type, the resulting code will be more efficient. If this is not
// the case, the resulting code will preform badly as we end up generating
// code to pack/unpack the results. It is the function that calls widen
// that is responsible for seeing this doesn't happen. For some cases, we
// have decided that it is not worth widening so we just split the operation.
// that is responsible for seeing this doesn't happen.
switch (Node->getOpcode()) {
default:
#ifndef NDEBUG
@ -8017,7 +8015,7 @@ SDValue SelectionDAGLegalize::WidenVectorOp(SDValue Op, MVT WidenVT) {
if (Result != Op)
Result = LegalizeOp(Result);
AddWidenOperand(Op, Result);
AddWidenedOperand(Op, Result);
return Result;
}

11
lib/CodeGen/SelectionDAG/LegalizeTypes.h
View File

@ -80,13 +80,14 @@ private:
return Legal;
case TargetLowering::Promote:
// Promote can mean
// 1) On integers, it means to promote type (e.g., i8 to i32)
// 2) For vectors, it means try to widen (e.g., v3i32 to v4i32)
// 1) On integers, use the promote integer type (e.g., i8 to i32)
// 2) For vectors, use the widen vector type returned by the target
// (e.g., v3i32 to v4i32). If the type is the same as the original
// type, than expand the vector instead.
if (!VT.isVector()) {
return PromoteInteger;
}
else {
// TODO: move widen code to LegalizeType
} else {
// TODO: move widen code to LegalizeType.
if (VT.getVectorNumElements() == 1) {
return ScalarizeVector;
} else {

2
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -645,7 +645,7 @@ unsigned TargetLowering::getVectorTypeBreakdown(MVT VT,
/// getWidenVectorType: given a vector type, returns the type to widen to
/// (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself.
/// If there is no vector type that we want to widen to, returns MVT::Other
/// When and were to widen is target dependent based on the cost of
/// When and where to widen is target dependent based on the cost of
/// scalarizing vs using the wider vector type.
MVT TargetLowering::getWidenVectorType(MVT VT) {
assert(VT.isVector());

6
lib/Target/X86/X86ISelLowering.cpp
View File

@ -523,7 +523,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::FEXP, MVT::f80, Expand);
setOperationAction(ISD::FEXP2, MVT::f80, Expand);
// First set operation action for all vector types to either to promote
// First set operation action for all vector types to either promote
// (for widening) or expand (for scalarization). Then we will selectively
// turn on ones that can be effectively codegen'd.
for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
@ -544,8 +544,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::EXTRACT_VECTOR_ELT,(MVT::SimpleValueType)VT,Expand);
setOperationAction(ISD::INSERT_VECTOR_ELT,(MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::EXTRACT_SUBVECTOR,(MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::CONCAT_VECTORS,(MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::FSIN, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::FCOS, (MVT::SimpleValueType)VT, Expand);
@ -7852,7 +7850,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
/// getWidenVectorType: given a vector type, returns the type to widen
/// to (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself.
/// If there is no vector type that we want to widen to, returns MVT::Other
/// When and were to widen is target dependent based on the cost of
/// When and where to widen is target dependent based on the cost of
/// scalarizing vs using the wider vector type.
MVT X86TargetLowering::getWidenVectorType(MVT VT) {