From 42052632ff612f82070f6cc76c19986c1d84506d Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Tue, 8 Jun 2021 08:57:12 -0700 Subject: [PATCH] reland [IR] make -stack-alignment= into a module attr Relands commit 433c8d950cb3a1fa0977355ce0367e8c763a3f13 with fixes for MIPS. Similar to D102742, specifying the stack alignment via CodegenOpts means that this flag gets dropped during LTO, unless the command line is re-specified as a plugin opt. Instead, encode this information as a module level attribute so that we don't have to expose this llvm internal flag when linking the Linux kernel with LTO. Looks like external dependencies might need a fix: * https://github.com/llvm-hs/llvm-hs/issues/345 * https://github.com/halide/Halide/issues/6079 Link: https://github.com/ClangBuiltLinux/linux/issues/1377 Reviewed By: tejohnson Differential Revision: https://reviews.llvm.org/D103048 --- include/llvm/IR/Module.h | 4 ++ include/llvm/Target/TargetOptions.h | 3 -- lib/CodeGen/CommandFlags.cpp | 7 --- lib/IR/Module.cpp | 11 ++++ lib/Target/Mips/MipsCallLowering.cpp | 7 ++- lib/Target/Mips/MipsTargetMachine.cpp | 12 ++--- lib/Target/X86/X86TargetMachine.cpp | 4 +- test/CodeGen/Generic/ForceStackAlign.ll | 5 +- test/CodeGen/Mips/stack-alignment.ll | 20 ++++--- test/CodeGen/X86/base-pointer-and-cmpxchg.ll | 10 ++-- test/CodeGen/X86/base-pointer-and-mwaitx.ll | 15 ++++-- .../X86/dynamic-allocas-VLAs-stack-align.ll | 46 ++++++++++++++++ test/CodeGen/X86/dynamic-allocas-VLAs.ll | 42 --------------- test/CodeGen/X86/force-align-stack-alloca.ll | 5 +- test/CodeGen/X86/hipe-cc.ll | 5 +- test/CodeGen/X86/hipe-cc64.ll | 4 +- test/CodeGen/X86/movtopush-stack-align.ll | 52 +++++++++++++++++++ test/CodeGen/X86/movtopush.ll | 45 ---------------- test/CodeGen/X86/pr11468.ll | 5 +- test/CodeGen/X86/unaligned-spill-folding.ll | 15 ++++-- test/CodeGen/X86/x86-64-baseptr.ll | 6 ++- .../CodeGen/X86/x86-64-xmm-spill-unaligned.ll | 4 +- test/Linker/stack-alignment.ll | 15 ++++++ 23 files changed, 206 insertions(+), 136 deletions(-) create mode 100644 test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll create mode 100644 test/CodeGen/X86/movtopush-stack-align.ll create mode 100644 test/Linker/stack-alignment.ll diff --git a/include/llvm/IR/Module.h b/include/llvm/IR/Module.h index 68e26c06453..81e29d9b86e 100644 --- a/include/llvm/IR/Module.h +++ b/include/llvm/IR/Module.h @@ -909,6 +909,10 @@ public: int getStackProtectorGuardOffset() const; void setStackProtectorGuardOffset(int Offset); + /// Get/set the stack alignment overridden from the default. + unsigned getOverrideStackAlignment() const; + void setOverrideStackAlignment(unsigned Align); + /// @name Utility functions for querying and setting the build SDK version /// @{ diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h index 3b2290ab9ec..5a905962691 100644 --- a/include/llvm/Target/TargetOptions.h +++ b/include/llvm/Target/TargetOptions.h @@ -201,9 +201,6 @@ namespace llvm { /// as their parent function, etc.), using an alternate ABI if necessary. unsigned GuaranteedTailCallOpt : 1; - /// StackAlignmentOverride - Override default stack alignment for target. - unsigned StackAlignmentOverride = 0; - /// StackSymbolOrdering - When true, this will allow CodeGen to order /// the local stack symbols (for code size, code locality, or any other /// heuristics). When false, the local symbols are left in whatever order diff --git a/lib/CodeGen/CommandFlags.cpp b/lib/CodeGen/CommandFlags.cpp index a7f6ca4c69f..f3cba622510 100644 --- a/lib/CodeGen/CommandFlags.cpp +++ b/lib/CodeGen/CommandFlags.cpp @@ -69,7 +69,6 @@ CGOPT(bool, DontPlaceZerosInBSS) CGOPT(bool, EnableGuaranteedTailCallOpt) CGOPT(bool, DisableTailCalls) CGOPT(bool, StackSymbolOrdering) -CGOPT(unsigned, OverrideStackAlignment) CGOPT(bool, StackRealign) CGOPT(std::string, TrapFuncName) CGOPT(bool, UseCtors) @@ -305,11 +304,6 @@ codegen::RegisterCodeGenFlags::RegisterCodeGenFlags() { cl::init(true)); CGBINDOPT(StackSymbolOrdering); - static cl::opt OverrideStackAlignment( - "stack-alignment", cl::desc("Override default stack alignment"), - cl::init(0)); - CGBINDOPT(OverrideStackAlignment); - static cl::opt StackRealign( "stackrealign", cl::desc("Force align the stack to the minimum alignment"), @@ -508,7 +502,6 @@ codegen::InitTargetOptionsFromCodeGenFlags(const Triple &TheTriple) { Options.EnableAIXExtendedAltivecABI = getEnableAIXExtendedAltivecABI(); Options.NoZerosInBSS = getDontPlaceZerosInBSS(); Options.GuaranteedTailCallOpt = getEnableGuaranteedTailCallOpt(); - Options.StackAlignmentOverride = getOverrideStackAlignment(); Options.StackSymbolOrdering = getStackSymbolOrdering(); Options.UseInitArray = !getUseCtors(); Options.RelaxELFRelocations = getRelaxELFRelocations(); diff --git a/lib/IR/Module.cpp b/lib/IR/Module.cpp index eae4e69e76f..9b955500b61 100644 --- a/lib/IR/Module.cpp +++ b/lib/IR/Module.cpp @@ -721,6 +721,17 @@ void Module::setStackProtectorGuardOffset(int Offset) { addModuleFlag(ModFlagBehavior::Error, "stack-protector-guard-offset", Offset); } +unsigned Module::getOverrideStackAlignment() const { + Metadata *MD = getModuleFlag("override-stack-alignment"); + if (auto *CI = mdconst::dyn_extract_or_null(MD)) + return CI->getZExtValue(); + return 0; +} + +void Module::setOverrideStackAlignment(unsigned Align) { + addModuleFlag(ModFlagBehavior::Error, "override-stack-alignment", Align); +} + void Module::setSDKVersion(const VersionTuple &V) { SmallVector Entries; Entries.push_back(V.getMajor()); diff --git a/lib/Target/Mips/MipsCallLowering.cpp b/lib/Target/Mips/MipsCallLowering.cpp index 9cd6f7f9e15..133cd2e72b7 100644 --- a/lib/Target/Mips/MipsCallLowering.cpp +++ b/lib/Target/Mips/MipsCallLowering.cpp @@ -588,8 +588,11 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, } unsigned NextStackOffset = CCInfo.getNextStackOffset(); - const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering(); - unsigned StackAlignment = TFL->getStackAlignment(); + unsigned StackAlignment = F.getParent()->getOverrideStackAlignment(); + if (!StackAlignment) { + const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering(); + StackAlignment = TFL->getStackAlignment(); + } NextStackOffset = alignTo(NextStackOffset, StackAlignment); CallSeqStart.addImm(NextStackOffset).addImm(0); diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index d4a71867630..7dd030f73d5 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -120,15 +120,11 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, getEffectiveCodeModel(CM, CodeModel::Small), OL), isLittle(isLittle), TLOF(std::make_unique()), ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), - Subtarget(nullptr), - DefaultSubtarget(TT, CPU, FS, isLittle, *this, - MaybeAlign(Options.StackAlignmentOverride)), + Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this, None), NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16", - isLittle, *this, - MaybeAlign(Options.StackAlignmentOverride)), + isLittle, *this, None), Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16", - isLittle, *this, - MaybeAlign(Options.StackAlignmentOverride)) { + isLittle, *this, None) { Subtarget = &DefaultSubtarget; initAsmInfo(); @@ -197,7 +193,7 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const { resetTargetOptions(F); I = std::make_unique( TargetTriple, CPU, FS, isLittle, *this, - MaybeAlign(Options.StackAlignmentOverride)); + MaybeAlign(F.getParent()->getOverrideStackAlignment())); } return I.get(); } diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index cb69169259c..ee8cff3e008 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -314,8 +314,8 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const { resetTargetOptions(F); I = std::make_unique( TargetTriple, CPU, TuneCPU, FS, *this, - MaybeAlign(Options.StackAlignmentOverride), PreferVectorWidthOverride, - RequiredVectorWidth); + MaybeAlign(F.getParent()->getOverrideStackAlignment()), + PreferVectorWidthOverride, RequiredVectorWidth); } return I.get(); } diff --git a/test/CodeGen/Generic/ForceStackAlign.ll b/test/CodeGen/Generic/ForceStackAlign.ll index 7eed8321308..ece31d211ca 100644 --- a/test/CodeGen/Generic/ForceStackAlign.ll +++ b/test/CodeGen/Generic/ForceStackAlign.ll @@ -1,7 +1,7 @@ ; Check that stack alignment can be forced. Individual targets should test their ; specific implementation details. -; RUN: llc < %s -stackrealign -stack-alignment=32 | FileCheck %s +; RUN: llc < %s -stackrealign | FileCheck %s ; CHECK-LABEL: @f ; CHECK-LABEL: @g @@ -25,3 +25,6 @@ if.then: } declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1) nounwind + +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/Mips/stack-alignment.ll b/test/CodeGen/Mips/stack-alignment.ll index 4a8768ce691..2ae917f50be 100644 --- a/test/CodeGen/Mips/stack-alignment.ll +++ b/test/CodeGen/Mips/stack-alignment.ll @@ -1,11 +1,14 @@ -; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32 -; RUN: llc -march=mipsel -stack-alignment=32 < %s | FileCheck %s -check-prefix=A32-32 -; RUN: llc -march=mipsel -mattr=+fp64,+mips32r2 < %s | FileCheck %s -check-prefix=32 -; RUN: llc -march=mips64el -mcpu=mips3 < %s | FileCheck %s -check-prefix=64 -; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s -check-prefix=64 -; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64 -; RUN: llc -march=mips64el -mcpu=mips64 -stack-alignment=32 < %s | FileCheck %s -check-prefix=A32-64 +; RUN: split-file %s %t +; RUN: cat %t/main.ll %t/_32.ll > %t/32.ll +; RUN: llc -march=mipsel < %t/main.ll | FileCheck %s -check-prefix=32 +; RUN: llc -march=mipsel < %t/32.ll | FileCheck %s -check-prefix=A32-32 +; RUN: llc -march=mipsel -mattr=+fp64,+mips32r2 < %t/main.ll | FileCheck %s -check-prefix=32 +; RUN: llc -march=mips64el -mcpu=mips3 < %t/main.ll | FileCheck %s -check-prefix=64 +; RUN: llc -march=mips64el -mcpu=mips4 < %t/main.ll | FileCheck %s -check-prefix=64 +; RUN: llc -march=mips64el -mcpu=mips64 < %t/main.ll | FileCheck %s -check-prefix=64 +; RUN: llc -march=mips64el -mcpu=mips64 < %t/32.ll | FileCheck %s -check-prefix=A32-64 +;--- main.ll ; 32: addiu $sp, $sp, -8 ; 64: daddiu $sp, $sp, -16 ; A32-32: addiu $sp, $sp, -32 @@ -17,3 +20,6 @@ entry: } attributes #0 = { "frame-pointer"="all" } +;--- _32.ll +!llvm.module.flags = !{!0} +!0 = !{i32 1, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/base-pointer-and-cmpxchg.ll b/test/CodeGen/X86/base-pointer-and-cmpxchg.ll index a79509b039a..ce694581a1d 100644 --- a/test/CodeGen/X86/base-pointer-and-cmpxchg.ll +++ b/test/CodeGen/X86/base-pointer-and-cmpxchg.ll @@ -1,7 +1,7 @@ -; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s -; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s -; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s -; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s +; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s +; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s +; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s +; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s ; This function uses dynamic allocated stack to force the use ; of a frame pointer. @@ -49,3 +49,5 @@ tail call void asm sideeffect "nop", "~{rax},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp}, store i32 %n, i32* %idx ret i1 %res } +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/base-pointer-and-mwaitx.ll b/test/CodeGen/X86/base-pointer-and-mwaitx.ll index 55fd730375e..a66f1a1d098 100644 --- a/test/CodeGen/X86/base-pointer-and-mwaitx.ll +++ b/test/CodeGen/X86/base-pointer-and-mwaitx.ll @@ -1,7 +1,11 @@ -; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s -; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign -stack-alignment=32 %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s -; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true %s -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s -; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true %s -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s +; RUN: split-file %s %t +; RUN: cat %t/main.ll %t/_align32.ll > %t/align32.ll +; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s +; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s +; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s +; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s + +;--- main.ll ; This test checks that we save and restore the base pointer (ebx or rbx) in the ; presence of the mwaitx intrinsic which requires to use ebx for one of its @@ -208,3 +212,6 @@ if.end: ; NO_BASE_32-NEXT: {{.+$}} declare void @llvm.x86.mwaitx(i32, i32, i32) nounwind +;--- _align32.ll +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll b/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll new file mode 100644 index 00000000000..2299cf604f9 --- /dev/null +++ b/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll @@ -0,0 +1,46 @@ +; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s +; rdar://11496434 +declare void @t1_helper(i32*) +declare void @t3_helper(i32*, i32*) + +; Test when forcing stack alignment +define i32 @t8() nounwind uwtable { +entry: + %a = alloca i32, align 4 + call void @t1_helper(i32* %a) nounwind + %0 = load i32, i32* %a, align 4 + %add = add nsw i32 %0, 13 + ret i32 %add + +; CHECK: _t8 +; CHECK: movq %rsp, %rbp +; CHECK: andq $-32, %rsp +; CHECK-NEXT: subq $32, %rsp +; CHECK: movq %rbp, %rsp +; CHECK: popq %rbp +} + +; VLAs +define i32 @t9(i64 %sz) nounwind uwtable { +entry: + %a = alloca i32, align 4 + %vla = alloca i32, i64 %sz, align 16 + call void @t3_helper(i32* %a, i32* %vla) nounwind + %0 = load i32, i32* %a, align 4 + %add = add nsw i32 %0, 13 + ret i32 %add + +; CHECK: _t9 +; CHECK: pushq %rbp +; CHECK: movq %rsp, %rbp +; CHECK: pushq %rbx +; CHECK: andq $-32, %rsp +; CHECK: subq $32, %rsp +; CHECK: movq %rsp, %rbx + +; CHECK: leaq -8(%rbp), %rsp +; CHECK: popq %rbx +; CHECK: popq %rbp +} +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/test/CodeGen/X86/dynamic-allocas-VLAs.ll index cf5e2f7537c..8f5427cbe2c 100644 --- a/test/CodeGen/X86/dynamic-allocas-VLAs.ll +++ b/test/CodeGen/X86/dynamic-allocas-VLAs.ll @@ -1,5 +1,4 @@ ; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s -; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN ; rdar://11496434 ; no VLAs or dynamic alignment @@ -184,44 +183,3 @@ declare i8* @llvm.stacksave() nounwind declare void @bar(i32, i32*, %struct.struct_t* byval(%struct.struct_t) align 8) declare void @llvm.stackrestore(i8*) nounwind - - -; Test when forcing stack alignment -define i32 @t8() nounwind uwtable { -entry: - %a = alloca i32, align 4 - call void @t1_helper(i32* %a) nounwind - %0 = load i32, i32* %a, align 4 - %add = add nsw i32 %0, 13 - ret i32 %add - -; FORCE-ALIGN: _t8 -; FORCE-ALIGN: movq %rsp, %rbp -; FORCE-ALIGN: andq $-32, %rsp -; FORCE-ALIGN-NEXT: subq $32, %rsp -; FORCE-ALIGN: movq %rbp, %rsp -; FORCE-ALIGN: popq %rbp -} - -; VLAs -define i32 @t9(i64 %sz) nounwind uwtable { -entry: - %a = alloca i32, align 4 - %vla = alloca i32, i64 %sz, align 16 - call void @t3_helper(i32* %a, i32* %vla) nounwind - %0 = load i32, i32* %a, align 4 - %add = add nsw i32 %0, 13 - ret i32 %add - -; FORCE-ALIGN: _t9 -; FORCE-ALIGN: pushq %rbp -; FORCE-ALIGN: movq %rsp, %rbp -; FORCE-ALIGN: pushq %rbx -; FORCE-ALIGN: andq $-32, %rsp -; FORCE-ALIGN: subq $32, %rsp -; FORCE-ALIGN: movq %rsp, %rbx - -; FORCE-ALIGN: leaq -8(%rbp), %rsp -; FORCE-ALIGN: popq %rbx -; FORCE-ALIGN: popq %rbp -} diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll index e9f38e9af62..9d81dff9ad2 100644 --- a/test/CodeGen/X86/force-align-stack-alloca.ll +++ b/test/CodeGen/X86/force-align-stack-alloca.ll @@ -3,7 +3,7 @@ ; arbitrarily force alignment up to 32-bytes for i386 hoping that this will ; exceed any ABI provisions. ; -; RUN: llc < %s -mcpu=generic -stackrealign -stack-alignment=32 | FileCheck %s +; RUN: llc < %s -mcpu=generic -stackrealign | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128" target triple = "i386-unknown-linux-gnu" @@ -74,3 +74,6 @@ if.then: } declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1) nounwind + +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/hipe-cc.ll b/test/CodeGen/X86/hipe-cc.ll index 96a61effaee..15d00ad56b4 100644 --- a/test/CodeGen/X86/hipe-cc.ll +++ b/test/CodeGen/X86/hipe-cc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=4 -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s ; Check the HiPE calling convention works (x86-32) @@ -89,3 +89,6 @@ define cc 11 { i32, i32, i32 } @tailcaller(i32 %hp, i32 %p) nounwind { @clos = external dso_local constant i32 declare cc 11 void @bar(i32, i32, i32, i32, i32) declare cc 11 { i32, i32, i32 } @tailcallee(i32, i32, i32, i32, i32, i32) + +!llvm.module.flags = !{!3} +!3 = !{i32 2, !"override-stack-alignment", i32 4} diff --git a/test/CodeGen/X86/hipe-cc64.ll b/test/CodeGen/X86/hipe-cc64.ll index 1758b4cee92..3e25d796615 100644 --- a/test/CodeGen/X86/hipe-cc64.ll +++ b/test/CodeGen/X86/hipe-cc64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s ; Check the HiPE calling convention works (x86-64) @@ -100,3 +100,5 @@ define cc 11 { i64, i64, i64 } @tailcaller(i64 %hp, i64 %p) #0 { @clos = external constant i64 declare cc 11 void @bar(i64, i64, i64, i64, i64, i64) declare cc 11 { i64, i64, i64 } @tailcallee(i64, i64, i64, i64, i64, i64, i64) +!llvm.module.flags = !{!3} +!3 = !{i32 2, !"override-stack-alignment", i32 8} diff --git a/test/CodeGen/X86/movtopush-stack-align.ll b/test/CodeGen/X86/movtopush-stack-align.ll new file mode 100644 index 00000000000..1924a5715da --- /dev/null +++ b/test/CodeGen/X86/movtopush-stack-align.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -mtriple=i686-windows -stackrealign | FileCheck %s + +declare void @good(i32 %a, i32 %b, i32 %c, i32 %d) +declare void @oneparam(i32 %a) +declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) + +; When there is no reserved call frame, check that additional alignment +; is added when the pushes don't add up to the required alignment. +; CHECK-LABEL: test5: +; CHECK: subl $16, %esp +; CHECK-NEXT: pushl $4 +; CHECK-NEXT: pushl $3 +; CHECK-NEXT: pushl $2 +; CHECK-NEXT: pushl $1 +; CHECK-NEXT: call +define void @test5(i32 %k) { +entry: + %a = alloca i32, i32 %k + call void @good(i32 1, i32 2, i32 3, i32 4) + ret void +} + +; When the alignment adds up, do the transformation +; CHECK-LABEL: test5b: +; CHECK: pushl $8 +; CHECK-NEXT: pushl $7 +; CHECK-NEXT: pushl $6 +; CHECK-NEXT: pushl $5 +; CHECK-NEXT: pushl $4 +; CHECK-NEXT: pushl $3 +; CHECK-NEXT: pushl $2 +; CHECK-NEXT: pushl $1 +; CHECK-NEXT: call +define void @test5b() optsize { +entry: + call void @eightparams(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8) + ret void +} + +; When having to compensate for the alignment isn't worth it, +; don't use pushes. +; CHECK-LABEL: test5c: +; CHECK: movl $1, (%esp) +; CHECK-NEXT: call +define void @test5c() optsize { +entry: + call void @oneparam(i32 1) + ret void +} + +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/movtopush.ll b/test/CodeGen/X86/movtopush.ll index f693b75f81c..2d632a2ac64 100644 --- a/test/CodeGen/X86/movtopush.ll +++ b/test/CodeGen/X86/movtopush.ll @@ -1,7 +1,6 @@ ; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL ; RUN: llc < %s -mtriple=i686-windows -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH ; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mtriple=i686-windows -stackrealign -stack-alignment=32 | FileCheck %s -check-prefix=ALIGNED ; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX %class.Class = type { i32 } @@ -125,50 +124,6 @@ entry: ret void } -; When there is no reserved call frame, check that additional alignment -; is added when the pushes don't add up to the required alignment. -; ALIGNED-LABEL: test5: -; ALIGNED: subl $16, %esp -; ALIGNED-NEXT: pushl $4 -; ALIGNED-NEXT: pushl $3 -; ALIGNED-NEXT: pushl $2 -; ALIGNED-NEXT: pushl $1 -; ALIGNED-NEXT: call -define void @test5(i32 %k) { -entry: - %a = alloca i32, i32 %k - call void @good(i32 1, i32 2, i32 3, i32 4) - ret void -} - -; When the alignment adds up, do the transformation -; ALIGNED-LABEL: test5b: -; ALIGNED: pushl $8 -; ALIGNED-NEXT: pushl $7 -; ALIGNED-NEXT: pushl $6 -; ALIGNED-NEXT: pushl $5 -; ALIGNED-NEXT: pushl $4 -; ALIGNED-NEXT: pushl $3 -; ALIGNED-NEXT: pushl $2 -; ALIGNED-NEXT: pushl $1 -; ALIGNED-NEXT: call -define void @test5b() optsize { -entry: - call void @eightparams(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8) - ret void -} - -; When having to compensate for the alignment isn't worth it, -; don't use pushes. -; ALIGNED-LABEL: test5c: -; ALIGNED: movl $1, (%esp) -; ALIGNED-NEXT: call -define void @test5c() optsize { -entry: - call void @oneparam(i32 1) - ret void -} - ; Check that pushing the addresses of globals (Or generally, things that ; aren't exactly immediates) isn't broken. ; Fixes PR21878. diff --git a/test/CodeGen/X86/pr11468.ll b/test/CodeGen/X86/pr11468.ll index c2bc370ed04..0df031bb9d8 100644 --- a/test/CodeGen/X86/pr11468.ll +++ b/test/CodeGen/X86/pr11468.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s ; PR11468 define void @f(i64 %sz) uwtable { @@ -29,5 +29,6 @@ entry: ; CHECK: popq %rbp } +!llvm.module.flags = !{!1} !0 = !{i32 125} - +!1 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/unaligned-spill-folding.ll b/test/CodeGen/X86/unaligned-spill-folding.ll index 935c0b967f9..8fa080dd661 100644 --- a/test/CodeGen/X86/unaligned-spill-folding.ll +++ b/test/CodeGen/X86/unaligned-spill-folding.ll @@ -1,7 +1,11 @@ -; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=4 -relocation-model=pic < %s | FileCheck %s -check-prefix=UNALIGNED -; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=16 -relocation-model=pic < %s | FileCheck %s -check-prefix=ALIGNED -; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stack-alignment=4 -stackrealign -relocation-model=pic < %s | FileCheck %s -check-prefix=FORCEALIGNED +; RUN: split-file %s %t +; RUN: cat %t/main.ll %t/align4.ll > %t/a2.ll +; RUN: cat %t/main.ll %t/align16.ll > %t/b2.ll +; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=UNALIGNED +; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/b2.ll | FileCheck %s -check-prefix=ALIGNED +; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stackrealign -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=FORCEALIGNED +;--- main.ll @arr = internal unnamed_addr global [32 x i32] zeroinitializer, align 16 ; PR12250 @@ -47,3 +51,8 @@ middle.block: ; FORCEALIGNED: movdqa {{.*}} # 16-byte Spill ; FORCEALIGNED: paddd {{.*}} # 16-byte Folded Reload } +!llvm.module.flags = !{!0} +;--- align4.ll +!0 = !{i32 2, !"override-stack-alignment", i32 4} +;--- align16.ll +!0 = !{i32 2, !"override-stack-alignment", i32 16} diff --git a/test/CodeGen/X86/x86-64-baseptr.ll b/test/CodeGen/X86/x86-64-baseptr.ll index 590a739644d..c0e84a20faa 100644 --- a/test/CodeGen/X86/x86-64-baseptr.ll +++ b/test/CodeGen/X86/x86-64-baseptr.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=x86_64-pc-linux -stackrealign -stack-alignment=32 < %s | FileCheck %s -; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -stackrealign -stack-alignment=32 < %s | FileCheck -check-prefix=X32ABI %s +; RUN: llc -mtriple=x86_64-pc-linux -stackrealign < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -stackrealign < %s | FileCheck -check-prefix=X32ABI %s ; This should run with NaCl as well ( -mtriple=x86_64-pc-nacl ) but currently doesn't due to PR22655 @@ -65,3 +65,5 @@ entry: } attributes #0 = { nounwind "frame-pointer"="all"} +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 32} diff --git a/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll b/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll index a724fe870cd..595afec6100 100644 --- a/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll +++ b/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll @@ -2,7 +2,7 @@ ; elements (here: XMM spills) are accessed using instructions that tolerate ; unaligned access. ; -; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem -stack-alignment=8 --frame-pointer=all < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem --frame-pointer=all < %s | FileCheck %s define dso_local preserve_allcc void @func() #0 { ; CHECK-LABEL: func: @@ -13,3 +13,5 @@ define dso_local preserve_allcc void @func() #0 { } attributes #0 = { nounwind } +!llvm.module.flags = !{!0} +!0 = !{i32 2, !"override-stack-alignment", i32 8} diff --git a/test/Linker/stack-alignment.ll b/test/Linker/stack-alignment.ll new file mode 100644 index 00000000000..bc729fb06ff --- /dev/null +++ b/test/Linker/stack-alignment.ll @@ -0,0 +1,15 @@ +; RUN: split-file %s %t +; RUN: llvm-link %t/main.ll %t/8.ll +; RUN: not llvm-link %t/main.ll %t/16.ll 2>&1 | FileCheck --check-prefix=CHECK-16 %s + +;--- main.ll +; NONE: error: linking module flags 'override-stack-alignment': IDs have conflicting values +; CHECK-16: error: linking module flags 'override-stack-alignment': IDs have conflicting values +!llvm.module.flags = !{!0} +!0 = !{i32 1, !"override-stack-alignment", i32 8} +;--- 8.ll +!llvm.module.flags = !{!0} +!0 = !{i32 1, !"override-stack-alignment", i32 8} +;--- 16.ll +!llvm.module.flags = !{!0} +!0 = !{i32 1, !"override-stack-alignment", i32 16}