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https://github.com/RPCS3/llvm-mirror.git
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Simplify interfaces used by regalloc to insert code
llvm-svn: 5052
This commit is contained in:
Chris Lattner
parent
351dc9af16
commit
4214ac384a
@ -13,6 +13,7 @@
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#include <assert.h>
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class Type;
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class MachineFunction;
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/// MRegisterDesc - This record contains all of the information known about a
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/// particular register.
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@ -112,36 +113,32 @@ public:
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virtual MachineBasicBlock::iterator
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storeReg2RegOffset(MachineBasicBlock *MBB,
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storeReg2RegOffset(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, unsigned DestReg,
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unsigned ImmOffset, unsigned dataSize) const = 0;
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virtual MachineBasicBlock::iterator
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loadRegOffset2Reg(MachineBasicBlock *MBB,
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loadRegOffset2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned ImmOffset, unsigned dataSize) const = 0;
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virtual MachineBasicBlock::iterator
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moveReg2Reg(MachineBasicBlock *MBB,
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moveReg2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg, unsigned dataSize) const = 0;
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virtual MachineBasicBlock::iterator
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moveImm2Reg(MachineBasicBlock *MBB,
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moveImm2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned Imm, unsigned dataSize) const = 0;
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virtual MachineBasicBlock::iterator
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emitPrologue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const = 0;
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virtual void
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emitPrologue(MachineFunction &MF, unsigned numBytes) const = 0;
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virtual MachineBasicBlock::iterator
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emitEpilogue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const = 0;
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virtual void
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emitEpilogue(MachineBasicBlock &MBB, unsigned numBytes) const = 0;
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virtual const unsigned* getCalleeSaveRegs() const = 0;
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virtual const unsigned* getCallerSaveRegs() const = 0;
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@ -199,7 +199,7 @@ RegAllocSimple::moveUseToReg (MachineBasicBlock &MBB,
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PhysReg = getFreeReg(VirtReg);
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// Add move instruction(s)
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return RegInfo->loadRegOffset2Reg(&MBB, I, PhysReg,
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return RegInfo->loadRegOffset2Reg(MBB, I, PhysReg,
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RegInfo->getFramePointer(),
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-stackOffset, regClass->getDataSize());
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}
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@ -215,7 +215,7 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock &MBB,
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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// Add move instruction(s)
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return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg,
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return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
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RegInfo->getFramePointer(),
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-stackOffset, regClass->getDataSize());
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}
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@ -231,7 +231,7 @@ RegAllocSimple::savePhysRegToStack (MachineBasicBlock &MBB,
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unsigned offset = allocateStackSpaceFor(PhysReg, regClass);
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// Add move instruction(s)
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return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg,
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return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
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RegInfo->getFramePointer(),
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offset, regClass->getDataSize());
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}
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@ -293,7 +293,7 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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// Retrieve the constant value from this op, move it to target
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// register of the phi
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if (opVal.isImmediate()) {
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opI = RegInfo->moveImm2Reg(&opBlock, opI, physReg,
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opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
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(unsigned) opVal.getImmedValue(),
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dataSize);
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saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
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@ -384,10 +384,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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AllocateBasicBlock(*MBB);
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// add prologue we should preserve callee-save registers...
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MachineFunction::iterator Fi = Fn.begin();
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MachineBasicBlock *MBB = Fi;
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MachineBasicBlock::iterator MBBi = MBB->begin();
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RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
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RegInfo->emitPrologue(Fn, NumBytesAllocated);
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const MachineInstrInfo &MII = TM.getInstrInfo();
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@ -400,7 +397,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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MachineInstr *MI = *--I;
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if (MII.isReturn(MI->getOpcode())) {
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// this block has a return instruction, add epilogue
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RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
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RegInfo->emitEpilogue(*MBB, NumBytesAllocated);
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}
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}
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@ -10,6 +10,7 @@
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#include "llvm/Constants.h"
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#include "llvm/Type.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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// X86Regs - Turn the X86RegisterInfo.def file into a bunch of register
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// descriptors
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@ -35,7 +36,7 @@ unsigned getIdx(unsigned dataSize) {
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
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X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, unsigned DestReg,
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unsigned ImmOffset, unsigned dataSize)
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@ -44,11 +45,11 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
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static const unsigned Opcode[] = { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32 };
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MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5),
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DestReg, ImmOffset).addReg(SrcReg);
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return ++(MBB->insert(MBBI, MI));
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return ++MBB.insert(MBBI, MI);
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB,
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X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned ImmOffset, unsigned dataSize)
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@ -57,11 +58,11 @@ X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB,
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static const unsigned Opcode[] = { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32 };
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MachineInstr *MI = addRegOffset(BuildMI(Opcode[getIdx(dataSize)], 5)
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.addReg(DestReg), SrcReg, ImmOffset);
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return ++(MBB->insert(MBBI, MI));
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return ++MBB.insert(MBBI, MI);
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::moveReg2Reg(MachineBasicBlock *MBB,
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X86RegisterInfo::moveReg2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned dataSize) const
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@ -69,11 +70,11 @@ X86RegisterInfo::moveReg2Reg(MachineBasicBlock *MBB,
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static const unsigned Opcode[] = { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
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MachineInstr *MI =
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BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(SrcReg);
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return ++(MBB->insert(MBBI, MI));
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return ++MBB.insert(MBBI, MI);
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::moveImm2Reg(MachineBasicBlock *MBB,
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X86RegisterInfo::moveImm2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned Imm, unsigned dataSize)
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const
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@ -81,7 +82,7 @@ X86RegisterInfo::moveImm2Reg(MachineBasicBlock *MBB,
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static const unsigned Opcode[] = { X86::MOVir8, X86::MOVir16, X86::MOVir32 };
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MachineInstr *MI =
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BuildMI(Opcode[getIdx(dataSize)], 2).addReg(DestReg).addReg(Imm);
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return ++(MBB->insert(MBBI, MI));
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return ++MBB.insert(MBBI, MI);
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}
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@ -106,55 +107,47 @@ const unsigned* X86RegisterInfo::getCallerSaveRegs() const {
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return CallerSaveRegs;
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::emitPrologue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const
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{
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MachineInstr *MI;
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void X86RegisterInfo::emitPrologue(MachineFunction &MF,
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unsigned numBytes) const {
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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MachineBasicBlock::iterator MBBI = MBB.begin();
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// PUSH ebp
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MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP);
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MBBI = ++(MBB->insert(MBBI, MI));
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MachineInstr *MI = BuildMI (X86::PUSHr32, 1).addReg(X86::EBP);
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MBBI = ++MBB.insert(MBBI, MI);
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// MOV ebp, esp
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MI = BuildMI (X86::MOVrr32, 2).addReg(X86::EBP).addReg(X86::ESP);
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MBBI = ++(MBB->insert(MBBI, MI));
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MBBI = ++MBB.insert(MBBI, MI);
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// adjust stack pointer
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MI = BuildMI(X86::SUBri32, 2).addReg(X86::ESP).addZImm(numBytes);
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MBBI = ++(MBB->insert(MBBI, MI));
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MBBI = ++MBB.insert(MBBI, MI);
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// PUSH all callee-save registers
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const unsigned* regs = getCalleeSaveRegs();
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while (*regs) {
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MI = BuildMI(X86::PUSHr32, 1).addReg(*regs);
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MBBI = ++(MBB->insert(MBBI, MI));
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MBBI = ++MBB.insert(MBBI, MI);
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++regs;
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}
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return MBBI;
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}
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MachineBasicBlock::iterator
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X86RegisterInfo::emitEpilogue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const
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{
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MachineInstr *MI;
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void X86RegisterInfo::emitEpilogue(MachineBasicBlock &MBB,
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unsigned numBytes) const {
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MachineBasicBlock::iterator MBBI = --MBB.end();
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assert((*MBBI)->getOpcode() == X86::RET &&
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"Can only insert epilog into returning blocks");
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// POP all callee-save registers in REVERSE ORDER
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static const unsigned regs[] = { X86::EBX, X86::EDI, X86::ESI,
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MRegisterInfo::NoRegister };
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unsigned idx = 0;
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while (regs[idx]) {
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MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]);
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MBBI = ++(MBB->insert(MBBI, MI));
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MachineInstr *MI = BuildMI(X86::POPr32, 1).addReg(regs[idx++]);
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MBBI = ++(MBB.insert(MBBI, MI));
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}
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// insert LEAVE
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MI = BuildMI(X86::LEAVE, 0);
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MBBI = ++(MBB->insert(MBBI, MI));
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return MBBI;
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MBB.insert(MBBI, BuildMI(X86::LEAVE, 0));
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}
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@ -18,24 +18,24 @@ struct X86RegisterInfo : public MRegisterInfo {
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MRegisterInfo::const_iterator regclass_end() const;
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MachineBasicBlock::iterator
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storeReg2RegOffset(MachineBasicBlock *MBB,
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storeReg2RegOffset(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned ImmOffset, unsigned dataSize) const;
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MachineBasicBlock::iterator
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loadRegOffset2Reg(MachineBasicBlock *MBB,
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loadRegOffset2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned ImmOffset, unsigned dataSize) const;
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MachineBasicBlock::iterator
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moveReg2Reg(MachineBasicBlock *MBB,
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moveReg2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg, unsigned dataSize) const;
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MachineBasicBlock::iterator
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moveImm2Reg(MachineBasicBlock *MBB,
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moveImm2Reg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned Imm, unsigned dataSize) const;
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@ -45,13 +45,8 @@ struct X86RegisterInfo : public MRegisterInfo {
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const unsigned* getCalleeSaveRegs() const;
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const unsigned* getCallerSaveRegs() const;
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MachineBasicBlock::iterator emitPrologue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const;
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MachineBasicBlock::iterator emitEpilogue(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned numBytes) const;
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void emitPrologue(MachineFunction &MF, unsigned numBytes) const;
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void emitEpilogue(MachineBasicBlock &MBB, unsigned numBytes) const;
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/// Returns register class appropriate for input SSA register
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///
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