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Change the default of AsmWriterClassName and isMCAsmWriter.

llvm-svn: 196065
This commit is contained in:
Rafael Espindola 2013-12-02 04:55:42 +00:00
parent fcc4ea594d
commit 427ca8d886
13 changed files with 10 additions and 88 deletions

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@ -949,7 +949,7 @@ class AsmWriter {
// AsmWriterClassName - This specifies the suffix to use for the asmwriter
// class. Generated AsmWriter classes are always prefixed with the target
// name.
string AsmWriterClassName = "AsmPrinter";
string AsmWriterClassName = "InstPrinter";
// Variant - AsmWriters can be of multiple different variants. Variants are
// used to support targets that need to emit assembly code in ways that are
@ -973,7 +973,7 @@ class AsmWriter {
// isMCAsmWriter - Is this assembly writer for an MC emitter? This controls
// generation of the printInstruction() method. For MC printers, it takes
// an MCInstr* operand, otherwise it takes a MachineInstr*.
bit isMCAsmWriter = 0;
bit isMCAsmWriter = 1;
}
def DefaultAsmWriter : AsmWriter;

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@ -54,20 +54,10 @@ include "AArch64InstrInfo.td"
def AArch64InstrInfo : InstrInfo;
//===----------------------------------------------------------------------===//
// Assembly printer
//===----------------------------------------------------------------------===//
def A64InstPrinter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
def AArch64 : Target {
let InstructionSet = AArch64InstrInfo;
let AssemblyWriters = [A64InstPrinter];
}

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@ -391,17 +391,6 @@ include "ARMInstrInfo.td"
def ARMInstrInfo : InstrInfo;
//===----------------------------------------------------------------------===//
// Assembly printer
//===----------------------------------------------------------------------===//
// ARM Uses the MC printer for asm output, so make sure the TableGen
// AsmWriter bits get associated with the correct class.
def ARMAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
@ -409,6 +398,4 @@ def ARMAsmWriter : AsmWriter {
def ARM : Target {
// Pull in Instruction Info:
let InstructionSet = ARMInstrInfo;
let AssemblyWriters = [ARMAsmWriter];
}

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@ -205,14 +205,6 @@ def : Proc<"hexagonv3", HexagonModel, [ArchV2, ArchV3]>;
def : Proc<"hexagonv4", HexagonModelV4, [ArchV2, ArchV3, ArchV4]>;
def : Proc<"hexagonv5", HexagonModelV4, [ArchV2, ArchV3, ArchV4, ArchV5]>;
// Hexagon Uses the MC printer for assembler output, so make sure the TableGen
// AsmWriter bits get associated with the correct class.
def HexagonAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
@ -220,6 +212,4 @@ def HexagonAsmWriter : AsmWriter {
def Hexagon : Target {
// Pull in Instruction Info:
let InstructionSet = HexagonInstrInfo;
let AssemblyWriters = [HexagonAsmWriter];
}

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@ -50,17 +50,11 @@ include "MSP430InstrInfo.td"
def MSP430InstrInfo : InstrInfo;
def MSP430InstPrinter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===----------------------------------------------------------------------===//
// Target Declaration
//===----------------------------------------------------------------------===//
def MSP430 : Target {
let InstructionSet = MSP430InstrInfo;
let AssemblyWriters = [MSP430InstPrinter];
}

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@ -96,11 +96,6 @@ def : Proc<"mips64", [FeatureMips64]>;
def : Proc<"mips64r2", [FeatureMips64r2]>;
def : Proc<"mips16", [FeatureMips16]>;
def MipsAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
def MipsAsmParser : AsmParser {
let ShouldEmitMatchRegisterName = 0;
let MnemonicContainsDot = 1;
@ -116,6 +111,5 @@ def MipsAsmParserVariant : AsmParserVariant {
def Mips : Target {
let InstructionSet = MipsInstrInfo;
let AssemblyParsers = [MipsAsmParser];
let AssemblyWriters = [MipsAsmWriter];
let AssemblyParserVariants = [MipsAsmParserVariant];
}

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@ -57,12 +57,6 @@ def : Proc<"sm_35", [SM35]>;
def NVPTXInstrInfo : InstrInfo {
}
def NVPTXAsmWriter : AsmWriter {
bit isMCAsmWriter = 1;
string AsmWriterClassName = "InstPrinter";
}
def NVPTX : Target {
let InstructionSet = NVPTXInstrInfo;
let AssemblyWriters = [NVPTXAsmWriter];
}

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@ -285,11 +285,6 @@ def PPCInstrInfo : InstrInfo {
let isLittleEndianEncoding = 1;
}
def PPCAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
def PPCAsmParser : AsmParser {
let ShouldEmitMatchRegisterName = 0;
}
@ -306,8 +301,7 @@ def PPCAsmParserVariant : AsmParserVariant {
def PPC : Target {
// Information about the instructions.
let InstructionSet = PPCInstrInfo;
let AssemblyWriters = [PPCAsmWriter];
let AssemblyParsers = [PPCAsmParser];
let AssemblyParserVariants = [PPCAsmParserVariant];
}

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@ -100,19 +100,9 @@ def AMDGPUInstrInfo : InstrInfo {
let guessInstructionProperties = 1;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
def AMDGPUAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
int Variant = 0;
bit isMCAsmWriter = 1;
}
def AMDGPU : Target {
// Pull in Instruction Info:
let InstructionSet = AMDGPUInstrInfo;
let AssemblyWriters = [AMDGPUAsmWriter];
}
// Include AMDGPU TD files

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@ -66,6 +66,11 @@ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
def SparcAsmWriter : AsmWriter {
string AsmWriterClassName = "AsmPrinter";
bit isMCAsmWriter = 0;
}
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
@ -73,4 +78,6 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
def Sparc : Target {
// Pull in Instruction Info:
let InstructionSet = SparcInstrInfo;
let AssemblyWriters = [SparcAsmWriter];
}

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@ -52,15 +52,6 @@ def SystemZAsmParser : AsmParser {
let ShouldEmitMatchRegisterName = 0;
}
//===----------------------------------------------------------------------===//
// Assembly writer
//===----------------------------------------------------------------------===//
def SystemZAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
//===----------------------------------------------------------------------===//
// Top-level target declaration
//===----------------------------------------------------------------------===//
@ -68,5 +59,4 @@ def SystemZAsmWriter : AsmWriter {
def SystemZ : Target {
let InstructionSet = SystemZInstrInfo;
let AssemblyParsers = [SystemZAsmParser];
let AssemblyWriters = [SystemZAsmWriter];
}

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@ -396,12 +396,10 @@ def IntelAsmParserVariant : AsmParserVariant {
def ATTAsmWriter : AsmWriter {
string AsmWriterClassName = "ATTInstPrinter";
int Variant = 0;
bit isMCAsmWriter = 1;
}
def IntelAsmWriter : AsmWriter {
string AsmWriterClassName = "IntelInstPrinter";
int Variant = 1;
bit isMCAsmWriter = 1;
}
def X86 : Target {

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@ -41,13 +41,7 @@ def : Proc<"xs1b-generic", []>;
// Declare the target which we are implementing
//===----------------------------------------------------------------------===//
def XCoreAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
bit isMCAsmWriter = 1;
}
def XCore : Target {
// Pull in Instruction Info:
let InstructionSet = XCoreInstrInfo;
let AssemblyWriters = [XCoreAsmWriter];
}