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Change the default of AsmWriterClassName and isMCAsmWriter.
llvm-svn: 196065
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@ -949,7 +949,7 @@ class AsmWriter {
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// AsmWriterClassName - This specifies the suffix to use for the asmwriter
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// class. Generated AsmWriter classes are always prefixed with the target
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// name.
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string AsmWriterClassName = "AsmPrinter";
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string AsmWriterClassName = "InstPrinter";
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// Variant - AsmWriters can be of multiple different variants. Variants are
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// used to support targets that need to emit assembly code in ways that are
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@ -973,7 +973,7 @@ class AsmWriter {
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// isMCAsmWriter - Is this assembly writer for an MC emitter? This controls
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// generation of the printInstruction() method. For MC printers, it takes
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// an MCInstr* operand, otherwise it takes a MachineInstr*.
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bit isMCAsmWriter = 0;
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bit isMCAsmWriter = 1;
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}
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def DefaultAsmWriter : AsmWriter;
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@ -54,20 +54,10 @@ include "AArch64InstrInfo.td"
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def AArch64InstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// Assembly printer
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//===----------------------------------------------------------------------===//
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def A64InstPrinter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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def AArch64 : Target {
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let InstructionSet = AArch64InstrInfo;
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let AssemblyWriters = [A64InstPrinter];
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}
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@ -391,17 +391,6 @@ include "ARMInstrInfo.td"
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def ARMInstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// Assembly printer
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//===----------------------------------------------------------------------===//
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// ARM Uses the MC printer for asm output, so make sure the TableGen
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// AsmWriter bits get associated with the correct class.
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def ARMAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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@ -409,6 +398,4 @@ def ARMAsmWriter : AsmWriter {
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def ARM : Target {
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// Pull in Instruction Info:
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let InstructionSet = ARMInstrInfo;
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let AssemblyWriters = [ARMAsmWriter];
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}
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@ -205,14 +205,6 @@ def : Proc<"hexagonv3", HexagonModel, [ArchV2, ArchV3]>;
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def : Proc<"hexagonv4", HexagonModelV4, [ArchV2, ArchV3, ArchV4]>;
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def : Proc<"hexagonv5", HexagonModelV4, [ArchV2, ArchV3, ArchV4, ArchV5]>;
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// Hexagon Uses the MC printer for assembler output, so make sure the TableGen
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// AsmWriter bits get associated with the correct class.
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def HexagonAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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@ -220,6 +212,4 @@ def HexagonAsmWriter : AsmWriter {
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def Hexagon : Target {
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// Pull in Instruction Info:
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let InstructionSet = HexagonInstrInfo;
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let AssemblyWriters = [HexagonAsmWriter];
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}
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@ -50,17 +50,11 @@ include "MSP430InstrInfo.td"
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def MSP430InstrInfo : InstrInfo;
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def MSP430InstPrinter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Target Declaration
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//===----------------------------------------------------------------------===//
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def MSP430 : Target {
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let InstructionSet = MSP430InstrInfo;
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let AssemblyWriters = [MSP430InstPrinter];
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}
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@ -96,11 +96,6 @@ def : Proc<"mips64", [FeatureMips64]>;
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def : Proc<"mips64r2", [FeatureMips64r2]>;
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def : Proc<"mips16", [FeatureMips16]>;
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def MipsAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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def MipsAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 0;
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let MnemonicContainsDot = 1;
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@ -116,6 +111,5 @@ def MipsAsmParserVariant : AsmParserVariant {
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def Mips : Target {
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let InstructionSet = MipsInstrInfo;
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let AssemblyParsers = [MipsAsmParser];
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let AssemblyWriters = [MipsAsmWriter];
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let AssemblyParserVariants = [MipsAsmParserVariant];
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}
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@ -57,12 +57,6 @@ def : Proc<"sm_35", [SM35]>;
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def NVPTXInstrInfo : InstrInfo {
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}
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def NVPTXAsmWriter : AsmWriter {
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bit isMCAsmWriter = 1;
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string AsmWriterClassName = "InstPrinter";
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}
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def NVPTX : Target {
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let InstructionSet = NVPTXInstrInfo;
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let AssemblyWriters = [NVPTXAsmWriter];
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}
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@ -285,11 +285,6 @@ def PPCInstrInfo : InstrInfo {
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let isLittleEndianEncoding = 1;
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}
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def PPCAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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def PPCAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 0;
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}
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@ -307,7 +302,6 @@ def PPC : Target {
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// Information about the instructions.
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let InstructionSet = PPCInstrInfo;
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let AssemblyWriters = [PPCAsmWriter];
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let AssemblyParsers = [PPCAsmParser];
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let AssemblyParserVariants = [PPCAsmParserVariant];
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}
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@ -100,19 +100,9 @@ def AMDGPUInstrInfo : InstrInfo {
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let guessInstructionProperties = 1;
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}
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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def AMDGPUAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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int Variant = 0;
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bit isMCAsmWriter = 1;
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}
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def AMDGPU : Target {
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// Pull in Instruction Info:
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let InstructionSet = AMDGPUInstrInfo;
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let AssemblyWriters = [AMDGPUAsmWriter];
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}
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// Include AMDGPU TD files
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@ -66,6 +66,11 @@ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
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def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
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def SparcAsmWriter : AsmWriter {
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string AsmWriterClassName = "AsmPrinter";
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bit isMCAsmWriter = 0;
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}
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//===----------------------------------------------------------------------===//
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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@ -73,4 +78,6 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
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def Sparc : Target {
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// Pull in Instruction Info:
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let InstructionSet = SparcInstrInfo;
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let AssemblyWriters = [SparcAsmWriter];
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}
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@ -52,15 +52,6 @@ def SystemZAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 0;
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}
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//===----------------------------------------------------------------------===//
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// Assembly writer
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//===----------------------------------------------------------------------===//
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def SystemZAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Top-level target declaration
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//===----------------------------------------------------------------------===//
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@ -68,5 +59,4 @@ def SystemZAsmWriter : AsmWriter {
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def SystemZ : Target {
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let InstructionSet = SystemZInstrInfo;
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let AssemblyParsers = [SystemZAsmParser];
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let AssemblyWriters = [SystemZAsmWriter];
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}
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@ -396,12 +396,10 @@ def IntelAsmParserVariant : AsmParserVariant {
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def ATTAsmWriter : AsmWriter {
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string AsmWriterClassName = "ATTInstPrinter";
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int Variant = 0;
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bit isMCAsmWriter = 1;
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}
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def IntelAsmWriter : AsmWriter {
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string AsmWriterClassName = "IntelInstPrinter";
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int Variant = 1;
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bit isMCAsmWriter = 1;
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}
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def X86 : Target {
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@ -41,13 +41,7 @@ def : Proc<"xs1b-generic", []>;
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// Declare the target which we are implementing
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//===----------------------------------------------------------------------===//
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def XCoreAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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def XCore : Target {
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// Pull in Instruction Info:
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let InstructionSet = XCoreInstrInfo;
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let AssemblyWriters = [XCoreAsmWriter];
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}
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