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ARM: make Darwin libcall registration table driven (NFC)

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Make the libcall updating table driven similar to the approach that the Linux
and Windows codepath does below.  NFC.

llvm-svn: 243951
This commit is contained in:
Saleem Abdulrasool 2015-08-04 03:57:52 +00:00
parent 7c144b9cc8
commit 42882342fa
1 changed files with 58 additions and 64 deletions
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122
lib/Target/ARM/ARMISelLowering.cpp
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@ -171,77 +171,71 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
// Uses VFP for Thumb libfuncs if available. // Uses VFP for Thumb libfuncs if available.
if (Subtarget->isThumb() && Subtarget->hasVFP2() && if (Subtarget->isThumb() && Subtarget->hasVFP2() &&
Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) { Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) {
// Single-precision floating-point arithmetic. static const struct {
setLibcallName(RTLIB::ADD_F32, "__addsf3vfp"); const RTLIB::Libcall Op;
setLibcallName(RTLIB::SUB_F32, "__subsf3vfp"); const char * const Name;
setLibcallName(RTLIB::MUL_F32, "__mulsf3vfp"); const ISD::CondCode Cond;
setLibcallName(RTLIB::DIV_F32, "__divsf3vfp"); } LibraryCalls[] = {
// Single-precision floating-point arithmetic.
{ RTLIB::ADD_F32, "__addsf3vfp", ISD::SETCC_INVALID },
{ RTLIB::SUB_F32, "__subsf3vfp", ISD::SETCC_INVALID },
{ RTLIB::MUL_F32, "__mulsf3vfp", ISD::SETCC_INVALID },
{ RTLIB::DIV_F32, "__divsf3vfp", ISD::SETCC_INVALID },
// Double-precision floating-point arithmetic. // Double-precision floating-point arithmetic.
setLibcallName(RTLIB::ADD_F64, "__adddf3vfp"); { RTLIB::ADD_F64, "__adddf3vfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::SUB_F64, "__subdf3vfp"); { RTLIB::SUB_F64, "__subdf3vfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::MUL_F64, "__muldf3vfp"); { RTLIB::MUL_F64, "__muldf3vfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::DIV_F64, "__divdf3vfp"); { RTLIB::DIV_F64, "__divdf3vfp", ISD::SETCC_INVALID },
// Single-precision comparisons. // Single-precision comparisons.
setLibcallName(RTLIB::OEQ_F32, "__eqsf2vfp"); { RTLIB::OEQ_F32, "__eqsf2vfp", ISD::SETNE },
setLibcallName(RTLIB::UNE_F32, "__nesf2vfp"); { RTLIB::UNE_F32, "__nesf2vfp", ISD::SETNE },
setLibcallName(RTLIB::OLT_F32, "__ltsf2vfp"); { RTLIB::OLT_F32, "__ltsf2vfp", ISD::SETNE },
setLibcallName(RTLIB::OLE_F32, "__lesf2vfp"); { RTLIB::OLE_F32, "__lesf2vfp", ISD::SETNE },
setLibcallName(RTLIB::OGE_F32, "__gesf2vfp"); { RTLIB::OGE_F32, "__gesf2vfp", ISD::SETNE },
setLibcallName(RTLIB::OGT_F32, "__gtsf2vfp"); { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE },
setLibcallName(RTLIB::UO_F32, "__unordsf2vfp"); { RTLIB::UO_F32, "__unordsf2vfp", ISD::SETNE },
setLibcallName(RTLIB::O_F32, "__unordsf2vfp"); { RTLIB::O_F32, "__unordsf2vfp", ISD::SETEQ },
setCmpLibcallCC(RTLIB::OEQ_F32, ISD::SETNE); // Double-precision comparisons.
setCmpLibcallCC(RTLIB::UNE_F32, ISD::SETNE); { RTLIB::OEQ_F64, "__eqdf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::OLT_F32, ISD::SETNE); { RTLIB::UNE_F64, "__nedf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::OLE_F32, ISD::SETNE); { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::OGE_F32, ISD::SETNE); { RTLIB::OLE_F64, "__ledf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::OGT_F32, ISD::SETNE); { RTLIB::OGE_F64, "__gedf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); { RTLIB::OGT_F64, "__gtdf2vfp", ISD::SETNE },
setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ); { RTLIB::UO_F64, "__unorddf2vfp", ISD::SETNE },
{ RTLIB::O_F64, "__unorddf2vfp", ISD::SETEQ },
// Double-precision comparisons. // Floating-point to integer conversions.
setLibcallName(RTLIB::OEQ_F64, "__eqdf2vfp"); // i64 conversions are done via library routines even when generating VFP
setLibcallName(RTLIB::UNE_F64, "__nedf2vfp"); // instructions, so use the same ones.
setLibcallName(RTLIB::OLT_F64, "__ltdf2vfp"); { RTLIB::FPTOSINT_F64_I32, "__fixdfsivfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::OLE_F64, "__ledf2vfp"); { RTLIB::FPTOUINT_F64_I32, "__fixunsdfsivfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::OGE_F64, "__gedf2vfp"); { RTLIB::FPTOSINT_F32_I32, "__fixsfsivfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::OGT_F64, "__gtdf2vfp"); { RTLIB::FPTOUINT_F32_I32, "__fixunssfsivfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::UO_F64, "__unorddf2vfp");
setLibcallName(RTLIB::O_F64, "__unorddf2vfp");
setCmpLibcallCC(RTLIB::OEQ_F64, ISD::SETNE); // Conversions between floating types.
setCmpLibcallCC(RTLIB::UNE_F64, ISD::SETNE); { RTLIB::FPROUND_F64_F32, "__truncdfsf2vfp", ISD::SETCC_INVALID },
setCmpLibcallCC(RTLIB::OLT_F64, ISD::SETNE); { RTLIB::FPEXT_F32_F64, "__extendsfdf2vfp", ISD::SETCC_INVALID },
setCmpLibcallCC(RTLIB::OLE_F64, ISD::SETNE);
setCmpLibcallCC(RTLIB::OGE_F64, ISD::SETNE);
setCmpLibcallCC(RTLIB::OGT_F64, ISD::SETNE);
setCmpLibcallCC(RTLIB::UO_F64, ISD::SETNE);
setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ);
// Floating-point to integer conversions. // Integer to floating-point conversions.
// i64 conversions are done via library routines even when generating VFP // i64 conversions are done via library routines even when generating VFP
// instructions, so use the same ones. // instructions, so use the same ones.
setLibcallName(RTLIB::FPTOSINT_F64_I32, "__fixdfsivfp"); // FIXME: There appears to be some naming inconsistency in ARM libgcc:
setLibcallName(RTLIB::FPTOUINT_F64_I32, "__fixunsdfsivfp"); // e.g., __floatunsidf vs. __floatunssidfvfp.
setLibcallName(RTLIB::FPTOSINT_F32_I32, "__fixsfsivfp"); { RTLIB::SINTTOFP_I32_F64, "__floatsidfvfp", ISD::SETCC_INVALID },
setLibcallName(RTLIB::FPTOUINT_F32_I32, "__fixunssfsivfp"); { RTLIB::UINTTOFP_I32_F64, "__floatunssidfvfp", ISD::SETCC_INVALID },
{ RTLIB::SINTTOFP_I32_F32, "__floatsisfvfp", ISD::SETCC_INVALID },
{ RTLIB::UINTTOFP_I32_F32, "__floatunssisfvfp", ISD::SETCC_INVALID },
};
// Conversions between floating types. for (const auto &LC : LibraryCalls) {
setLibcallName(RTLIB::FPROUND_F64_F32, "__truncdfsf2vfp"); setLibcallName(LC.Op, LC.Name);
setLibcallName(RTLIB::FPEXT_F32_F64, "__extendsfdf2vfp"); if (LC.Cond != ISD::SETCC_INVALID)
setCmpLibcallCC(LC.Op, LC.Cond);
// Integer to floating-point conversions. }
// i64 conversions are done via library routines even when generating VFP
// instructions, so use the same ones.
// FIXME: There appears to be some naming inconsistency in ARM libgcc:
// e.g., __floatunsidf vs. __floatunssidfvfp.
setLibcallName(RTLIB::SINTTOFP_I32_F64, "__floatsidfvfp");
setLibcallName(RTLIB::UINTTOFP_I32_F64, "__floatunssidfvfp");
setLibcallName(RTLIB::SINTTOFP_I32_F32, "__floatsisfvfp");
setLibcallName(RTLIB::UINTTOFP_I32_F32, "__floatunssisfvfp");
} }
} }