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[X86][AVX512] Drop some default NoItinerary arguments that aren't needed any more

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llvm-svn: 319782
This commit is contained in:
Simon Pilgrim 2017-12-05 16:10:57 +00:00
parent 704f96490c
commit 4292278b25
1 changed files with 10 additions and 9 deletions
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19
lib/Target/X86/X86InstrAVX512.td
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@ -311,7 +311,7 @@ multiclass AVX512_maskable_scalar<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag Ins, string OpcodeStr, dag Outs, dag Ins, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
dag RHS, dag RHS,
InstrItinClass itin = NoItinerary, InstrItinClass itin,
bit IsCommutable = 0> : bit IsCommutable = 0> :
AVX512_maskable<O, F, _, Outs, Ins, OpcodeStr, AttSrcAsm, IntelSrcAsm, AVX512_maskable<O, F, _, Outs, Ins, OpcodeStr, AttSrcAsm, IntelSrcAsm,
RHS, itin, IsCommutable, 0, X86selects>; RHS, itin, IsCommutable, 0, X86selects>;
@ -340,7 +340,7 @@ multiclass AVX512_maskable_3src<bits<8> O, Format F, X86VectorVTInfo _,
multiclass AVX512_maskable_3src_scalar<bits<8> O, Format F, X86VectorVTInfo _, multiclass AVX512_maskable_3src_scalar<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag NonTiedIns, string OpcodeStr, dag Outs, dag NonTiedIns, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
dag RHS, InstrItinClass itin = NoItinerary, dag RHS, InstrItinClass itin,
bit IsCommutable = 0, bit IsCommutable = 0,
bit IsKCommutable = 0, bit IsKCommutable = 0,
bit MaskOnly = 0> : bit MaskOnly = 0> :
@ -353,7 +353,7 @@ multiclass AVX512_maskable_in_asm<bits<8> O, Format F, X86VectorVTInfo _,
string OpcodeStr, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
list<dag> Pattern, list<dag> Pattern,
InstrItinClass itin = NoItinerary> : InstrItinClass itin> :
AVX512_maskable_custom<O, F, Outs, Ins, AVX512_maskable_custom<O, F, Outs, Ins,
!con((ins _.RC:$src0, _.KRCWM:$mask), Ins), !con((ins _.RC:$src0, _.KRCWM:$mask), Ins),
!con((ins _.KRCWM:$mask), Ins), !con((ins _.KRCWM:$mask), Ins),
@ -370,7 +370,7 @@ multiclass AVX512_maskable_custom_cmp<bits<8> O, Format F,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
list<dag> Pattern, list<dag> Pattern,
list<dag> MaskingPattern, list<dag> MaskingPattern,
InstrItinClass itin = NoItinerary, InstrItinClass itin,
bit IsCommutable = 0> { bit IsCommutable = 0> {
let isCommutable = IsCommutable in let isCommutable = IsCommutable in
def NAME: AVX512<O, F, Outs, Ins, def NAME: AVX512<O, F, Outs, Ins,
@ -390,7 +390,7 @@ multiclass AVX512_maskable_common_cmp<bits<8> O, Format F, X86VectorVTInfo _,
string OpcodeStr, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
dag RHS, dag MaskingRHS, dag RHS, dag MaskingRHS,
InstrItinClass itin = NoItinerary, InstrItinClass itin,
bit IsCommutable = 0> : bit IsCommutable = 0> :
AVX512_maskable_custom_cmp<O, F, Outs, Ins, MaskingIns, OpcodeStr, AVX512_maskable_custom_cmp<O, F, Outs, Ins, MaskingIns, OpcodeStr,
AttSrcAsm, IntelSrcAsm, AttSrcAsm, IntelSrcAsm,
@ -400,7 +400,7 @@ multiclass AVX512_maskable_common_cmp<bits<8> O, Format F, X86VectorVTInfo _,
multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _, multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag Ins, string OpcodeStr, dag Outs, dag Ins, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
dag RHS, InstrItinClass itin = NoItinerary, dag RHS, InstrItinClass itin,
bit IsCommutable = 0> : bit IsCommutable = 0> :
AVX512_maskable_common_cmp<O, F, _, Outs, Ins, AVX512_maskable_common_cmp<O, F, _, Outs, Ins,
!con((ins _.KRCWM:$mask), Ins), !con((ins _.KRCWM:$mask), Ins),
@ -410,7 +410,7 @@ multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _,
multiclass AVX512_maskable_cmp_alt<bits<8> O, Format F, X86VectorVTInfo _, multiclass AVX512_maskable_cmp_alt<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag Ins, string OpcodeStr, dag Outs, dag Ins, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
InstrItinClass itin = NoItinerary> : InstrItinClass itin> :
AVX512_maskable_custom_cmp<O, F, Outs, AVX512_maskable_custom_cmp<O, F, Outs,
Ins, !con((ins _.KRCWM:$mask),Ins), OpcodeStr, Ins, !con((ins _.KRCWM:$mask),Ins), OpcodeStr,
AttSrcAsm, IntelSrcAsm, [],[], itin>; AttSrcAsm, IntelSrcAsm, [],[], itin>;
@ -422,7 +422,7 @@ multiclass AVX512_maskable_logic<bits<8> O, Format F, X86VectorVTInfo _,
dag Outs, dag Ins, string OpcodeStr, dag Outs, dag Ins, string OpcodeStr,
string AttSrcAsm, string IntelSrcAsm, string AttSrcAsm, string IntelSrcAsm,
dag RHS, dag MaskedRHS, dag RHS, dag MaskedRHS,
InstrItinClass itin = NoItinerary, InstrItinClass itin,
bit IsCommutable = 0, SDNode Select = vselect> : bit IsCommutable = 0, SDNode Select = vselect> :
AVX512_maskable_custom<O, F, Outs, Ins, AVX512_maskable_custom<O, F, Outs, Ins,
!con((ins _.RC:$src0, _.KRCWM:$mask), Ins), !con((ins _.RC:$src0, _.KRCWM:$mask), Ins),
@ -4770,7 +4770,8 @@ multiclass avx512_fp_scalar_sae<bits<8> opc, string OpcodeStr,X86VectorVTInfo _,
(ins _.RC:$src1, _.RC:$src2), OpcodeStr, (ins _.RC:$src1, _.RC:$src2), OpcodeStr,
"{sae}, $src2, $src1", "$src1, $src2, {sae}", "{sae}, $src2, $src1", "$src1, $src2, {sae}",
(SaeNode (_.VT _.RC:$src1), (_.VT _.RC:$src2), (SaeNode (_.VT _.RC:$src1), (_.VT _.RC:$src2),
(i32 FROUND_NO_EXC))>, EVEX_B, Sched<[itins.Sched]>; (i32 FROUND_NO_EXC)), itins.rr>, EVEX_B,
Sched<[itins.Sched]>;
} }
} }