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AMDGPU: Fix element size assertion

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The GlobalISel usage called this with bits, but the DAG usage was
incorrectly using bytes.
This commit is contained in:
Matt Arsenault 2020-01-22 11:18:45 -05:00 committed by Matt Arsenault
parent b889862fe2
commit 42c5f78e96
1 changed files with 1 additions and 1 deletions
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2
lib/Target/AMDGPU/SIISelLowering.cpp
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@ -3505,7 +3505,7 @@ static MachineBasicBlock *emitIndirectDst(MachineInstr &MI,
}
const MCInstrDesc &MovRelDesc
= TII->getIndirectRegWritePseudo(TRI.getRegSizeInBits(*VecRC), 4, false);
= TII->getIndirectRegWritePseudo(TRI.getRegSizeInBits(*VecRC), 32, false);
if (setM0ToIndexFromSGPR(TII, MRI, MI, Offset, UseGPRIdxMode, false)) {
MachineBasicBlock::iterator I(&MI);