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[PowerPC][AIX] Update save/restore offset for frame and base pointers.

General purpose registers 30 and 31 are handled differently when they are
reserved as the base-pointer and frame-pointer respectively. This fixes the
offset of their fixed-stack objects when there are fpr calle-saved registers.

Differential Revision: https://reviews.llvm.org/D85850
This commit is contained in:
Sean Fertile 2020-09-01 11:16:37 -04:00
parent d9375ed652
commit 42dd72a403
3 changed files with 44 additions and 35 deletions

View File

@ -863,26 +863,18 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
int FPOffset = 0;
if (HasFP) {
if (isSVR4ABI) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
FPOffset = MFI.getObjectOffset(FPIndex);
} else {
FPOffset = getFramePointerSaveOffset();
}
MachineFrameInfo &MFI = MF.getFrameInfo();
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
FPOffset = MFI.getObjectOffset(FPIndex);
}
int BPOffset = 0;
if (HasBP) {
if (isSVR4ABI) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int BPIndex = FI->getBasePointerSaveIndex();
assert(BPIndex && "No Base Pointer Save Slot!");
BPOffset = MFI.getObjectOffset(BPIndex);
} else {
BPOffset = getBasePointerSaveOffset();
}
MachineFrameInfo &MFI = MF.getFrameInfo();
int BPIndex = FI->getBasePointerSaveIndex();
assert(BPIndex && "No Base Pointer Save Slot!");
BPOffset = MFI.getObjectOffset(BPIndex);
}
int PBPOffset = 0;
@ -1551,8 +1543,6 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
// Get processor type.
bool isPPC64 = Subtarget.isPPC64();
// Get the ABI.
bool isSVR4ABI = Subtarget.isSVR4ABI();
// Check if the link register (LR) has been saved.
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
@ -1600,24 +1590,16 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
SingleScratchReg = ScratchReg == TempReg;
if (HasFP) {
if (isSVR4ABI) {
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
FPOffset = MFI.getObjectOffset(FPIndex);
} else {
FPOffset = getFramePointerSaveOffset();
}
int FPIndex = FI->getFramePointerSaveIndex();
assert(FPIndex && "No Frame Pointer Save Slot!");
FPOffset = MFI.getObjectOffset(FPIndex);
}
int BPOffset = 0;
if (HasBP) {
if (isSVR4ABI) {
int BPIndex = FI->getBasePointerSaveIndex();
assert(BPIndex && "No Base Pointer Save Slot!");
BPOffset = MFI.getObjectOffset(BPIndex);
} else {
BPOffset = getBasePointerSaveOffset();
}
}
int PBPOffset = 0;

View File

@ -10,17 +10,17 @@
; - Address of %AlignedBuffer is calculated based off offset from the stack
; pointer.
define void @caller() {
define float @caller(float %f) {
%AlignedBuffer = alloca [32 x i32], align 32
%Pointer = getelementptr inbounds [32 x i32], [32 x i32]* %AlignedBuffer, i64 0, i64 0
call void @callee(i32* %Pointer)
ret void
ret float %f
}
declare void @callee(i32*)
; 32BIT-LABEL: .caller:
; 32BIT: stw 30, -8(1)
; 32BIT: stw 30, -16(1)
; 32BIT: mr 30, 1
; 32BIT: clrlwi 0, 1, 27
; 32BIT: subfic 0, 0, -224
@ -28,10 +28,10 @@ declare void @callee(i32*)
; 32BIT: addi 3, 1, 64
; 32BIT: bl .callee
; 32BIT: lwz 1, 0(1)
; 32BIT: lwz 30, -8(1)
; 32BIT: lwz 30, -16(1)
; 64BIT-LABEL: .caller:
; 64BIT: std 30, -16(1)
; 64BIT: std 30, -24(1)
; 64BIT: mr 30, 1
; 64BIT: clrldi 0, 1, 59
; 64BIT: subfic 0, 0, -288
@ -39,4 +39,4 @@ declare void @callee(i32*)
; 64BIT: addi 3, 1, 128
; 64BIT: bl .callee
; 64BIT: ld 1, 0(1)
; 64BIT: ld 30, -16(1)
; 64BIT: ld 30, -24(1)

View File

@ -0,0 +1,27 @@
; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple=powerpc-ibm-aix-xcoff | \
; RUN: FileCheck %s -check-prefix=AIX32
; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple=powerpc64-ibm-aix-xcoff | \
; RUN: FileCheck %s -check-prefixes=AIX64
declare void @clobber(i32*)
define dso_local float @frameptr_only(i32 %n, float %f) {
entry:
%0 = alloca i32, i32 %n
call void @clobber(i32* %0)
ret float %f
}
; AIX32: stw 31, -12(1)
; AIX32: stwu 1, -80(1)
; AIX32: lwz 1, 0(1)
; AIX32: lwz 31, -12(1)
; AIX64: std 31, -16(1)
; AIX64: stdu 1, -144(1)
; AIX64: ld 1, 0(1)
; AIX64: ld 31, -16(1)