From 4349dfb2f3440005ee1400ed967e6a956336a8c3 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Wed, 11 Jul 2018 10:39:50 +0000 Subject: [PATCH] [AArch64] Regenerate SDIV tests Will make codegen diffs much easier to grok in a future patch llvm-svn: 336786 --- test/CodeGen/AArch64/fast-isel-sdiv.ll | 65 ++++++++++-------- test/CodeGen/AArch64/sdivpow2.ll | 91 +++++++++++++++----------- 2 files changed, 92 insertions(+), 64 deletions(-) diff --git a/test/CodeGen/AArch64/fast-isel-sdiv.ll b/test/CodeGen/AArch64/fast-isel-sdiv.ll index 3c8de43af6c..5d8d549d693 100644 --- a/test/CodeGen/AArch64/fast-isel-sdiv.ll +++ b/test/CodeGen/AArch64/fast-isel-sdiv.ll @@ -1,56 +1,69 @@ -; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK,ISEL +; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK,FAST define i32 @sdiv_i32_exact(i32 %a) { -; CHECK-LABEL: sdiv_i32_exact -; CHECK: asr {{w[0-9]+}}, w0, #3 +; CHECK-LABEL: sdiv_i32_exact: +; CHECK: // %bb.0: +; CHECK-NEXT: asr w0, w0, #3 +; CHECK-NEXT: ret %1 = sdiv exact i32 %a, 8 ret i32 %1 } define i32 @sdiv_i32_pos(i32 %a) { -; CHECK-LABEL: sdiv_i32_pos -; CHECK: add [[REG1:w[0-9]+]], w0, #7 -; CHECK-NEXT: cmp w0, #0 -; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt -; CHECK-NEXT: asr {{w[0-9]+}}, [[REG2]], #3 +; CHECK-LABEL: sdiv_i32_pos: +; CHECK: // %bb.0: +; CHECK-NEXT: add w8, w0, #7 // =7 +; CHECK-NEXT: cmp w0, #0 // =0 +; CHECK-NEXT: csel w8, w8, w0, lt +; CHECK-NEXT: asr w0, w8, #3 +; CHECK-NEXT: ret %1 = sdiv i32 %a, 8 ret i32 %1 } define i32 @sdiv_i32_neg(i32 %a) { -; CHECK-LABEL: sdiv_i32_neg -; CHECK: add [[REG1:w[0-9]+]], w0, #7 -; CHECK-NEXT: cmp w0, #0 -; CHECK-NEXT: csel [[REG2:w[0-9]+]], [[REG1]], w0, lt -; CHECK-NEXT: neg {{w[0-9]+}}, [[REG2]], asr #3 +; CHECK-LABEL: sdiv_i32_neg: +; CHECK: // %bb.0: +; CHECK-NEXT: add w8, w0, #7 // =7 +; CHECK-NEXT: cmp w0, #0 // =0 +; CHECK-NEXT: csel w8, w8, w0, lt +; CHECK-NEXT: neg w0, w8, asr #3 +; CHECK-NEXT: ret %1 = sdiv i32 %a, -8 ret i32 %1 } define i64 @sdiv_i64_exact(i64 %a) { -; CHECK-LABEL: sdiv_i64_exact -; CHECK: asr {{x[0-9]+}}, x0, #4 +; CHECK-LABEL: sdiv_i64_exact: +; CHECK: // %bb.0: +; CHECK-NEXT: asr x0, x0, #4 +; CHECK-NEXT: ret %1 = sdiv exact i64 %a, 16 ret i64 %1 } define i64 @sdiv_i64_pos(i64 %a) { -; CHECK-LABEL: sdiv_i64_pos -; CHECK: add [[REG1:x[0-9]+]], x0, #15 -; CHECK-NEXT: cmp x0, #0 -; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt -; CHECK-NEXT: asr {{x[0-9]+}}, [[REG2]], #4 +; CHECK-LABEL: sdiv_i64_pos: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #15 // =15 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: asr x0, x8, #4 +; CHECK-NEXT: ret %1 = sdiv i64 %a, 16 ret i64 %1 } define i64 @sdiv_i64_neg(i64 %a) { -; CHECK-LABEL: sdiv_i64_neg -; CHECK: add [[REG1:x[0-9]+]], x0, #15 -; CHECK-NEXT: cmp x0, #0 -; CHECK-NEXT: csel [[REG2:x[0-9]+]], [[REG1]], x0, lt -; CHECK-NEXT: neg {{x[0-9]+}}, [[REG2]], asr #4 +; CHECK-LABEL: sdiv_i64_neg: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #15 // =15 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: neg x0, x8, asr #4 +; CHECK-NEXT: ret %1 = sdiv i64 %a, -16 ret i64 %1 } diff --git a/test/CodeGen/AArch64/sdivpow2.ll b/test/CodeGen/AArch64/sdivpow2.ll index 6c02ea9a467..dd1c21b75b0 100644 --- a/test/CodeGen/AArch64/sdivpow2.ll +++ b/test/CodeGen/AArch64/sdivpow2.ll @@ -1,73 +1,88 @@ -; RUN: llc -mtriple=arm64-linux-gnu -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s -; RUN: llc -mtriple=arm64-linux-gnu -fast-isel=1 -verify-machineinstrs < %s | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ISEL +; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,FAST define i32 @test1(i32 %x) { -; CHECK-LABEL: test1 -; CHECK: add w8, w0, #7 -; CHECK: cmp w0, #0 -; CHECK: csel w8, w8, w0, lt -; CHECK: asr w0, w8, #3 +; CHECK-LABEL: test1: +; CHECK: // %bb.0: +; CHECK-NEXT: add w8, w0, #7 // =7 +; CHECK-NEXT: cmp w0, #0 // =0 +; CHECK-NEXT: csel w8, w8, w0, lt +; CHECK-NEXT: asr w0, w8, #3 +; CHECK-NEXT: ret %div = sdiv i32 %x, 8 ret i32 %div } define i32 @test2(i32 %x) { -; CHECK-LABEL: test2 -; CHECK: add w8, w0, #7 -; CHECK: cmp w0, #0 -; CHECK: csel w8, w8, w0, lt -; CHECK: neg w0, w8, asr #3 +; CHECK-LABEL: test2: +; CHECK: // %bb.0: +; CHECK-NEXT: add w8, w0, #7 // =7 +; CHECK-NEXT: cmp w0, #0 // =0 +; CHECK-NEXT: csel w8, w8, w0, lt +; CHECK-NEXT: neg w0, w8, asr #3 +; CHECK-NEXT: ret %div = sdiv i32 %x, -8 ret i32 %div } define i32 @test3(i32 %x) { -; CHECK-LABEL: test3 -; CHECK: add w8, w0, #31 -; CHECK: cmp w0, #0 -; CHECK: csel w8, w8, w0, lt -; CHECK: asr w0, w8, #5 +; CHECK-LABEL: test3: +; CHECK: // %bb.0: +; CHECK-NEXT: add w8, w0, #31 // =31 +; CHECK-NEXT: cmp w0, #0 // =0 +; CHECK-NEXT: csel w8, w8, w0, lt +; CHECK-NEXT: asr w0, w8, #5 +; CHECK-NEXT: ret %div = sdiv i32 %x, 32 ret i32 %div } define i64 @test4(i64 %x) { -; CHECK-LABEL: test4 -; CHECK: add x8, x0, #7 -; CHECK: cmp x0, #0 -; CHECK: csel x8, x8, x0, lt -; CHECK: asr x0, x8, #3 +; CHECK-LABEL: test4: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #7 // =7 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: asr x0, x8, #3 +; CHECK-NEXT: ret %div = sdiv i64 %x, 8 ret i64 %div } define i64 @test5(i64 %x) { -; CHECK-LABEL: test5 -; CHECK: add x8, x0, #7 -; CHECK: cmp x0, #0 -; CHECK: csel x8, x8, x0, lt -; CHECK: neg x0, x8, asr #3 +; CHECK-LABEL: test5: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #7 // =7 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: neg x0, x8, asr #3 +; CHECK-NEXT: ret %div = sdiv i64 %x, -8 ret i64 %div } define i64 @test6(i64 %x) { -; CHECK-LABEL: test6 -; CHECK: add x8, x0, #63 -; CHECK: cmp x0, #0 -; CHECK: csel x8, x8, x0, lt -; CHECK: asr x0, x8, #6 +; CHECK-LABEL: test6: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #63 // =63 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: asr x0, x8, #6 +; CHECK-NEXT: ret %div = sdiv i64 %x, 64 ret i64 %div } define i64 @test7(i64 %x) { -; CHECK-LABEL: test7 -; CHECK: orr [[REG:x[0-9]+]], xzr, #0xffffffffffff -; CHECK: add x8, x0, [[REG]] -; CHECK: cmp x0, #0 -; CHECK: csel x8, x8, x0, lt -; CHECK: asr x0, x8, #48 +; CHECK-LABEL: test7: +; CHECK: // %bb.0: +; CHECK-NEXT: orr x8, xzr, #0xffffffffffff +; CHECK-NEXT: add x8, x0, x8 +; CHECK-NEXT: cmp x0, #0 // =0 +; CHECK-NEXT: csel x8, x8, x0, lt +; CHECK-NEXT: asr x0, x8, #48 +; CHECK-NEXT: ret %div = sdiv i64 %x, 281474976710656 ret i64 %div }