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[RISCV] Fixed SmallVector.h Assertion `idx < size()'

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Summary:

RISCVAsmParser needs to handle the case the error message is of specific type, other than the generic Match_InvalidOperand, and the corresponding
operand is missing.

This bug was uncovered by a LLVM MC Assembler Protocol Buffer Fuzzer  for the RISC-V assembly language.

Reviewers: asb

Reviewed By: asb

Subscribers: llvm-commits, jocewei, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX

Differential Revision: https://reviews.llvm.org/D50790

llvm-svn: 341104
This commit is contained in:
Ana Pazos 2018-08-30 19:43:19 +00:00
parent 8577019430
commit 43bc47d387
2 changed files with 19 additions and 1 deletions
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18
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
View File

@ -684,7 +684,9 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
bool MatchingInlineAsm) {
MCInst Inst;
switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) {
auto Result =
MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
switch (Result) {
default:
break;
case Match_Success:
@ -705,6 +707,20 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
}
return Error(ErrorLoc, "invalid operand for instruction");
}
}
// Handle the case when the error message is of specific type
// other than the generic Match_InvalidOperand, and the
// corresponding operand is missing.
if (Result > FIRST_TARGET_MATCH_RESULT_TY) {
SMLoc ErrorLoc = IDLoc;
if (ErrorInfo != ~0U && ErrorInfo >= Operands.size())
return Error(ErrorLoc, "too few operands for instruction");
}
switch(Result) {
default:
break;
case Match_InvalidImmXLen:
if (isRV64()) {
SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc();

2
test/MC/RISCV/rv32i-invalid.s
View File

@ -138,6 +138,8 @@ lw a4, a5, 111 # CHECK: :[[@LINE]]:8: error: immediate must be an integer in the
# Too few operands
ori a0, a1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
xor s2, s2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# FIXME: Fix jal behavior to interpret a3 as a symbol rather than a register.
jal a3 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Instruction not in the base ISA
mul a4, ra, s0 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled