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[AMDGPU] Don't mark the .note section as ALLOC
Marking a section as ALLOC tells the ELF loader to load the section into memory. As we do not want to load the notes into VRAM, the flag should not be there. On AMDHSA, .note is still marked as ALLOC, apparently this is currently needed for OpenCL (see https://reviews.llvm.org/D74995). Differential Revision: https://reviews.llvm.org/D76278
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@ -393,9 +393,9 @@ void AMDGPUTargetAsmStreamer::EmitAmdhsaKernelDescriptor(
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// AMDGPUTargetELFStreamer
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//===----------------------------------------------------------------------===//
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AMDGPUTargetELFStreamer::AMDGPUTargetELFStreamer(
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MCStreamer &S, const MCSubtargetInfo &STI)
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: AMDGPUTargetStreamer(S), Streamer(S) {
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AMDGPUTargetELFStreamer::AMDGPUTargetELFStreamer(MCStreamer &S,
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const MCSubtargetInfo &STI)
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: AMDGPUTargetStreamer(S), Streamer(S), Os(STI.getTargetTriple().getOS()) {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned EFlags = MCA.getELFHeaderEFlags();
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@ -438,9 +438,15 @@ void AMDGPUTargetELFStreamer::EmitNote(
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auto NameSZ = Name.size() + 1;
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unsigned NoteFlags = 0;
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// TODO Apparently, this is currently needed for OpenCL as mentioned in
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// https://reviews.llvm.org/D74995
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if (Os == Triple::AMDHSA)
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NoteFlags = ELF::SHF_ALLOC;
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S.PushSection();
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S.SwitchSection(Context.getELFSection(
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ElfNote::SectionName, ELF::SHT_NOTE, ELF::SHF_ALLOC));
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S.SwitchSection(
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Context.getELFSection(ElfNote::SectionName, ELF::SHT_NOTE, NoteFlags));
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S.emitInt32(NameSZ); // namesz
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S.emitValue(DescSZ, 4); // descz
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S.emitInt32(NoteType); // type
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@ -133,6 +133,7 @@ public:
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class AMDGPUTargetELFStreamer final : public AMDGPUTargetStreamer {
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MCStreamer &Streamer;
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Triple::OSType Os;
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void EmitNote(StringRef Name, const MCExpr *DescSize, unsigned NoteType,
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function_ref<void(MCELFStreamer &)> EmitDesc);
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33
test/CodeGen/AMDGPU/amdpal-elf.ll
Normal file
33
test/CodeGen/AMDGPU/amdpal-elf.ll
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@ -0,0 +1,33 @@
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; RUN: llc < %s -mtriple=amdgcn--amdpal -mcpu=kaveri -filetype=obj -mattr=-code-object-v3 | llvm-readobj -symbols -s -sd | FileCheck --check-prefix=ELF %s
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; RUN: llc < %s -mtriple=amdgcn--amdpal -mcpu=kaveri -mattr=-code-object-v3 | llvm-mc -filetype=obj -triple amdgcn--amdpal -mcpu=kaveri -mattr=-code-object-v3 | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
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; RUN: llc < %s -mtriple=amdgcn--amdpal -mcpu=gfx1010 -mattr=+WavefrontSize32,-WavefrontSize64,-code-object-v3 | FileCheck --check-prefix=GFX10-W32 %s
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; RUN: llc < %s -mtriple=amdgcn--amdpal -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64,-code-object-v3 | FileCheck --check-prefix=GFX10-W64 %s
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; ELF: Section {
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; ELF: Name: .text
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; ELF: Type: SHT_PROGBITS (0x1)
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; ELF: Flags [ (0x6)
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; ELF: SHF_ALLOC (0x2)
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; ELF: SHF_EXECINSTR (0x4)
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; ELF: }
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; ELF: SHT_NOTE
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; ELF: Flags [ (0x0)
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; ELF: ]
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; ELF: Symbol {
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; ELF: Name: simple
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; ELF: Size: 36
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; ELF: Section: .text (0x2)
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; ELF: }
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; GFX10-W32: NumSGPRsForWavesPerEU: 4
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; GFX10-W32: NumVGPRsForWavesPerEU: 3
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; GFX10-W64: NumSGPRsForWavesPerEU: 2
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; GFX10-W64: NumVGPRsForWavesPerEU: 3
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define amdgpu_kernel void @simple(i32 addrspace(1)* %out) {
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entry:
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store i32 0, i32 addrspace(1)* %out
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ret void
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}
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