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[SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2 number of elements.
The check for the shuffles usages probably isn't correct for non power of 2 vectors. llvm-svn: 337651
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@ -2668,6 +2668,10 @@ static bool isVectorReductionOp(const User *I) {
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}
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unsigned ElemNum = Inst->getType()->getVectorNumElements();
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// Ensure the reduction size is a power of 2.
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if (!isPowerOf2_32(ElemNum))
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return false;
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unsigned ElemNumToReduce = ElemNum;
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// Do DFS search on the def-use chain from the given instruction. We only
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