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https://github.com/RPCS3/llvm-mirror.git
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Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions.
llvm-svn: 154580
This commit is contained in:
Craig Topper
parent
ceb845983c
commit
448790d566
@ -904,13 +904,13 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Test instruction with bitwise comparison.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse41_ptestz : GCCBuiltin<"__builtin_ia32_ptestz128">,
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Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
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Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_sse41_ptestc : GCCBuiltin<"__builtin_ia32_ptestc128">,
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Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
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Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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def int_x86_sse41_ptestnzc : GCCBuiltin<"__builtin_ia32_ptestnzc128">,
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Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
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Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrNoMem]>;
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}
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@ -6331,11 +6331,11 @@ def : Pat<(f64 (ftrunc FR64:$src)),
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let Defs = [EFLAGS], Predicates = [HasAVX] in {
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def VPTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
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"vptest\t{$src2, $src1|$src1, $src2}",
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[(set EFLAGS, (X86ptest VR128:$src1, (v4f32 VR128:$src2)))]>,
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[(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
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OpSize, VEX;
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def VPTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
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"vptest\t{$src2, $src1|$src1, $src2}",
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[(set EFLAGS,(X86ptest VR128:$src1, (memopv4f32 addr:$src2)))]>,
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[(set EFLAGS,(X86ptest VR128:$src1, (memopv2i64 addr:$src2)))]>,
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OpSize, VEX;
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def VPTESTYrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR256:$src1, VR256:$src2),
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@ -6351,11 +6351,11 @@ def VPTESTYrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR256:$src1, i256mem:$src2),
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let Defs = [EFLAGS] in {
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def PTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
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"ptest\t{$src2, $src1|$src1, $src2}",
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[(set EFLAGS, (X86ptest VR128:$src1, (v4f32 VR128:$src2)))]>,
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[(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
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OpSize;
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def PTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
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"ptest\t{$src2, $src1|$src1, $src2}",
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[(set EFLAGS, (X86ptest VR128:$src1, (memopv4f32 addr:$src2)))]>,
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[(set EFLAGS, (X86ptest VR128:$src1, (memopv2i64 addr:$src2)))]>,
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OpSize;
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}
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@ -1078,33 +1078,33 @@ define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
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declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone
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define i32 @test_x86_sse41_ptestc(<4 x float> %a0, <4 x float> %a1) {
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define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) {
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; CHECK: vptest
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; CHECK: sbbl
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%res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
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%res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
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ret i32 %res
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}
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declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
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define i32 @test_x86_sse41_ptestnzc(<4 x float> %a0, <4 x float> %a1) {
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define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) {
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; CHECK: vptest
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; CHECK: seta
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; CHECK: movzbl
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%res = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
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%res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
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ret i32 %res
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}
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declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
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define i32 @test_x86_sse41_ptestz(<4 x float> %a0, <4 x float> %a1) {
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define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) {
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; CHECK: vptest
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; CHECK: sete
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; CHECK: movzbl
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%res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1]
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%res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1]
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ret i32 %res
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}
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declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
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define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) {
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@ -183,8 +183,8 @@ define <4 x float> @insertps_3(<4 x float> %t1, <4 x float> %t2) nounwind {
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; X64: insertps $0, %xmm1, %xmm0
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}
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define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %t1, <4 x float> %t2) nounwind readnone
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define i32 @ptestz_1(<2 x i64> %t1, <2 x i64> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
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ret i32 %tmp1
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; X32: _ptestz_1:
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; X32: ptest %xmm1, %xmm0
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@ -195,8 +195,8 @@ define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind {
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; X64: sete %al
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}
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define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %t1, <4 x float> %t2) nounwind readnone
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define i32 @ptestz_2(<2 x i64> %t1, <2 x i64> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
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ret i32 %tmp1
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; X32: _ptestz_2:
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; X32: ptest %xmm1, %xmm0
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@ -207,8 +207,8 @@ define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind {
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; X64: sbbl %eax
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}
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define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %t1, <4 x float> %t2) nounwind readnone
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define i32 @ptestz_3(<2 x i64> %t1, <2 x i64> %t2) nounwind {
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%tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
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ret i32 %tmp1
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; X32: _ptestz_3:
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; X32: ptest %xmm1, %xmm0
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@ -220,9 +220,9 @@ define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind {
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}
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declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
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declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
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; This used to compile to insertps $0 + insertps $16. insertps $0 is always
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; pointless.
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