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Modify diagnostic messages to clearly indicate the why interleaving wasn't done.
Sometimes interleaving is not beneficial, as determined by the cost-model and sometimes it is disabled by a loop hint (by the user). This patch modifies the diagnostic messages to make it clear why interleaving wasn't done. llvm-svn: 244485
This commit is contained in:
Tyler Nowicki
parent
2a6af41342
commit
455075e570
@ -1577,11 +1577,17 @@ struct LoopVectorize : public FunctionPass {
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}
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if (Hints.getWidth() == 1 && Hints.getInterleave() == 1) {
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// FIXME: Add a separate metadata to indicate when the loop has already
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// been vectorized instead of setting width and count to 1.
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DEBUG(dbgs() << "LV: Not vectorizing: Disabled/already vectorized.\n");
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// FIXME: Add interleave.disable metadata. This will allow
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// vectorize.disable to be used without disabling the pass and errors
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// to differentiate between disabled vectorization and a width of 1.
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emitOptimizationRemarkAnalysis(
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F->getContext(), DEBUG_TYPE, *F, L->getStartLoc(),
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"loop not vectorized: vector width and interleave count are "
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"explicitly set to 1");
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"loop not vectorized: vectorization and interleaving are explicitly "
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"disabled, or vectorize width and interleave count are both set to "
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"1");
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return false;
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}
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@ -1652,28 +1658,74 @@ struct LoopVectorize : public FunctionPass {
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// Select the interleave count.
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unsigned IC = CM.selectInterleaveCount(OptForSize, VF.Width, VF.Cost);
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DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width << ") in "
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<< DebugLocStr << '\n');
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DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
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// Get user interleave count.
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unsigned UserIC = Hints.getInterleave();
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// Identify the diagnostic messages that should be produced.
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std::string VecDiagMsg, IntDiagMsg;
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bool VectorizeLoop = true, InterleaveLoop = true;
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if (VF.Width == 1) {
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DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial\n");
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DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
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VecDiagMsg =
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"the cost-model indicates that vectorization is not beneficial";
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VectorizeLoop = false;
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}
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if (IC == 1) {
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emitOptimizationRemarkAnalysis(
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F->getContext(), DEBUG_TYPE, *F, L->getStartLoc(),
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"not beneficial to vectorize and user disabled interleaving");
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return false;
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}
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DEBUG(dbgs() << "LV: Trying to at least unroll the loops.\n");
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if (IC == 1 && UserIC <= 1) {
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// Tell the user interleaving is not beneficial.
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DEBUG(dbgs() << "LV: Interleaving is not beneficial.\n");
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IntDiagMsg =
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"the cost-model indicates that interleaving is not beneficial";
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InterleaveLoop = false;
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if (UserIC == 1)
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IntDiagMsg +=
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" and is explicitly disabled or interleave count is set to 1";
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} else if (IC > 1 && UserIC == 1) {
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// Tell the user interleaving is beneficial, but it explicitly disabled.
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DEBUG(dbgs()
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<< "LV: Interleaving is beneficial but is explicitly disabled.");
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IntDiagMsg = "the cost-model indicates that interleaving is beneficial "
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"but is explicitly disabled or interleave count is set to 1";
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InterleaveLoop = false;
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}
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// Report the unrolling decision.
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emitOptimizationRemark(F->getContext(), DEBUG_TYPE, *F, L->getStartLoc(),
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Twine("interleaved by " + Twine(IC) +
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" (vectorization not beneficial)"));
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// Override IC if user provided an interleave count.
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IC = UserIC > 0 ? UserIC : IC;
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// Emit diagnostic messages, if any.
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if (!VectorizeLoop && !InterleaveLoop) {
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// Do not vectorize or interleaving the loop.
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emitOptimizationRemarkAnalysis(F->getContext(), DEBUG_TYPE, *F,
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L->getStartLoc(), VecDiagMsg);
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emitOptimizationRemarkAnalysis(F->getContext(), DEBUG_TYPE, *F,
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L->getStartLoc(), IntDiagMsg);
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return false;
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} else if (!VectorizeLoop && InterleaveLoop) {
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DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
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emitOptimizationRemarkAnalysis(F->getContext(), DEBUG_TYPE, *F,
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L->getStartLoc(), VecDiagMsg);
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} else if (VectorizeLoop && !InterleaveLoop) {
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DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width << ") in "
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<< DebugLocStr << '\n');
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emitOptimizationRemarkAnalysis(F->getContext(), DEBUG_TYPE, *F,
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L->getStartLoc(), IntDiagMsg);
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} else if (VectorizeLoop && InterleaveLoop) {
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DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width << ") in "
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<< DebugLocStr << '\n');
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DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
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}
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if (!VectorizeLoop) {
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assert(IC > 1 && "interleave count should not be 1 or 0");
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// If we decided that it is not legal to vectorize the loop then
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// interleave it.
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InnerLoopUnroller Unroller(L, SE, LI, DT, TLI, TTI, IC);
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Unroller.vectorize(&LVL);
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emitOptimizationRemark(F->getContext(), DEBUG_TYPE, *F, L->getStartLoc(),
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Twine("interleaved loop (interleaved count: ") +
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Twine(IC) + ")");
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} else {
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// If we decided that it is *legal* to vectorize the loop then do it.
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InnerLoopVectorizer LB(L, SE, LI, DT, TLI, TTI, VF.Width, IC);
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@ -4635,11 +4687,6 @@ unsigned LoopVectorizationCostModel::selectInterleaveCount(bool OptForSize,
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// 3. We don't interleave if we think that we will spill registers to memory
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// due to the increased register pressure.
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// Use the user preference, unless 'auto' is selected.
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int UserUF = Hints->getInterleave();
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if (UserUF != 0)
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return UserUF;
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// When we optimize for size, we don't interleave.
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if (OptForSize)
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return 1;
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@ -25,7 +25,7 @@
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; File, line, and column should match those specified in the metadata
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; CHECK: remark: source.cpp:4:5: loop not vectorized: could not determine number of loop iterations
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; CHECK: remark: source.cpp:4:5: loop not vectorized: use -Rpass-analysis=loop-vectorize for more info
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; CHECK: remark: source.cpp:13:5: loop not vectorized: vector width and interleave count are explicitly set to 1
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; CHECK: remark: source.cpp:13:5: loop not vectorized: vectorization and interleaving are explicitly disabled, or vectorize width and interleave count are both set to 1
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; CHECK: remark: source.cpp:19:5: loop not vectorized: cannot identify array bounds
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; CHECK: remark: source.cpp:19:5: loop not vectorized: use -Rpass-analysis=loop-vectorize for more info
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; CHECK: warning: source.cpp:19:5: loop not vectorized: failed explicitly specified loop vectorization
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@ -0,0 +1,114 @@
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; RUN: opt < %s -loop-vectorize -pass-remarks-analysis='loop-vectorize' -mtriple=x86_64-unknown-linux -S 2>&1 | FileCheck %s
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; Verify analysis remarks are generated when interleaving is not beneficial.
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; CHECK: remark: vectorization-remarks-profitable.c:4:14: the cost-model indicates that vectorization is not beneficial
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; CHECK: remark: vectorization-remarks-profitable.c:4:14: the cost-model indicates that interleaving is not beneficial and is explicitly disabled or interleave count is set to 1
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; CHECK: remark: vectorization-remarks-profitable.c:11:14: the cost-model indicates that vectorization is not beneficial
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; CHECK: remark: vectorization-remarks-profitable.c:11:14: the cost-model indicates that interleaving is not beneficial
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; First loop.
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; #pragma clang loop interleave(disable) unroll(disable)
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; for(int i = 0; i < n; i++) {
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; out[i] = in[i];
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; }
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; Second loop.
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; #pragma clang loop unroll(disable)
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; for(int i = 0; i < n; i++) {
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; out[i] = in[i];
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; }
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.10.0"
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; Function Attrs: nounwind ssp uwtable
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define void @do_not_interleave(float* nocapture %out, float* nocapture readonly %in, i32 %n) #0 {
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entry:
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%cmp.7 = icmp sgt i32 %n, 0, !dbg !3
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br i1 %cmp.7, label %for.body.preheader, label %for.cond.cleanup, !dbg !8
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for.body.preheader: ; preds = %entry
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br label %for.body, !dbg !9
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for.cond.cleanup.loopexit: ; preds = %for.body
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br label %for.cond.cleanup, !dbg !10
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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ret void, !dbg !10
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds float, float* %in, i64 %indvars.iv, !dbg !9
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%0 = bitcast float* %arrayidx to i32*, !dbg !9
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%1 = load i32, i32* %0, align 4, !dbg !9, !tbaa !11
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%arrayidx2 = getelementptr inbounds float, float* %out, i64 %indvars.iv, !dbg !15
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%2 = bitcast float* %arrayidx2 to i32*, !dbg !16
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store i32 %1, i32* %2, align 4, !dbg !16, !tbaa !11
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !8
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !8
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%exitcond = icmp eq i32 %lftr.wideiv, %n, !dbg !8
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body, !dbg !8, !llvm.loop !17
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}
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; Function Attrs: nounwind ssp uwtable
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define void @interleave_not_profitable(float* nocapture %out, float* nocapture readonly %in, i32 %n) #0 {
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entry:
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%cmp.7 = icmp sgt i32 %n, 0, !dbg !20
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br i1 %cmp.7, label %for.body.preheader, label %for.cond.cleanup, !dbg !22
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for.body.preheader: ; preds = %entry
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br label %for.body, !dbg !23
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for.cond.cleanup.loopexit: ; preds = %for.body
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br label %for.cond.cleanup, !dbg !24
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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ret void, !dbg !24
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds float, float* %in, i64 %indvars.iv, !dbg !23
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%0 = bitcast float* %arrayidx to i32*, !dbg !23
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%1 = load i32, i32* %0, align 4, !dbg !23, !tbaa !11
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%arrayidx2 = getelementptr inbounds float, float* %out, i64 %indvars.iv, !dbg !25
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%2 = bitcast float* %arrayidx2 to i32*, !dbg !26
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store i32 %1, i32* %2, align 4, !dbg !26, !tbaa !11
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !22
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !22
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%exitcond = icmp eq i32 %lftr.wideiv, %n, !dbg !22
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body, !dbg !22, !llvm.loop !27
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}
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attributes #0 = { nounwind }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 2, !"Debug Info Version", i32 3}
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!1 = !{i32 1, !"PIC Level", i32 2}
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!2 = !{!"clang version 3.7.0"}
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!3 = !DILocation(line: 3, column: 20, scope: !4)
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!4 = !DISubprogram(name: "do_not_interleave", scope: !5, file: !5, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, function: void (float*, float*, i32)* @do_not_interleave, variables: !7)
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!5 = !DIFile(filename: "vectorization-remarks-profitable.c", directory: "")
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!6 = !DISubroutineType(types: !7)
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!7 = !{}
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!8 = !DILocation(line: 3, column: 3, scope: !4)
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!9 = !DILocation(line: 4, column: 14, scope: !4)
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!10 = !DILocation(line: 6, column: 1, scope: !4)
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!11 = !{!12, !12, i64 0}
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!12 = !{!"float", !13, i64 0}
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!13 = !{!"omnipotent char", !14, i64 0}
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!14 = !{!"Simple C/C++ TBAA"}
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!15 = !DILocation(line: 4, column: 5, scope: !4)
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!16 = !DILocation(line: 4, column: 12, scope: !4)
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!17 = distinct !{!17, !18, !19}
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!18 = !{!"llvm.loop.interleave.count", i32 1}
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!19 = !{!"llvm.loop.unroll.disable"}
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!20 = !DILocation(line: 10, column: 20, scope: !21)
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!21 = !DISubprogram(name: "interleave_not_profitable", scope: !5, file: !5, line: 8, type: !6, isLocal: false, isDefinition: true, scopeLine: 8, flags: DIFlagPrototyped, isOptimized: true, function: void (float*, float*, i32)* @interleave_not_profitable, variables: !7)
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!22 = !DILocation(line: 10, column: 3, scope: !21)
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!23 = !DILocation(line: 11, column: 14, scope: !21)
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!24 = !DILocation(line: 13, column: 1, scope: !21)
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!25 = !DILocation(line: 11, column: 5, scope: !21)
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!26 = !DILocation(line: 11, column: 12, scope: !21)
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!27 = distinct !{!27, !19}
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@ -9,9 +9,9 @@
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; DEBUG-OUTPUT-NOT: .loc
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; DEBUG-OUTPUT-NOT: {{.*}}.debug_info
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; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vector width and interleave count are explicitly set to 1
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; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interleaved count: 1)
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; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved by 4 (vectorization not beneficial)
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; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)
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; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving are explicitly disabled, or vectorize width and interleave count are both set to 1
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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