RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
Code Issues Projects Releases Wiki Activity

MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.

Browse Source 
- This fixes "leal 0, %eax", for example.

llvm-svn: 103205
This commit is contained in:
Daniel Dunbar 2010-05-06 22:39:14 +00:00
parent c788971da7
commit 45589cd853
2 changed files with 7 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/X86InstrInfo.td
View File

@ -197,14 +197,14 @@ def X86MemAsmOperand : AsmOperandClass {
let Name = "Mem";
let SuperClass = ?;
}
def X86AbsMemAsmOperand : AsmOperandClass {
let Name = "AbsMem";
let SuperClass = X86MemAsmOperand;
}
def X86NoSegMemAsmOperand : AsmOperandClass {
let Name = "NoSegMem";
let SuperClass = X86MemAsmOperand;
}
def X86AbsMemAsmOperand : AsmOperandClass {
let Name = "AbsMem";
let SuperClass = X86NoSegMemAsmOperand;
}
class X86MemOperand<string printMethod> : Operand<iPTR> {
let PrintMethod = printMethod;
let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);

3
test/MC/AsmParser/X86/x86_instructions.s
View File

@ -143,3 +143,6 @@
fadd %st(0)
fadd %st(1)
fadd %st(7)
// CHECK: leal 0, %eax
leal 0, %eax