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[InstCombine] fix names in canEvaluateShiftedShift(); NFC
It's not clear what 'First' and 'Second' mean, so use 'Inner' and 'Outer' to match foldShiftedShift() and add comments with formulas, so it's easier to see what's going on. llvm-svn: 292153
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@ -65,44 +65,43 @@ Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
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}
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/// Return true if we can simplify two logical (either left or right) shifts
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/// that have constant shift amounts.
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static bool canEvaluateShiftedShift(unsigned FirstShiftAmt,
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bool IsFirstShiftLeft,
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Instruction *SecondShift, InstCombiner &IC,
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/// that have constant shift amounts: OuterShift (InnerShift X, C1), C2.
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static bool canEvaluateShiftedShift(unsigned OuterShAmt, bool IsOuterShl,
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Instruction *InnerShift, InstCombiner &IC,
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Instruction *CxtI) {
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assert(SecondShift->isLogicalShift() && "Unexpected instruction type");
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assert(InnerShift->isLogicalShift() && "Unexpected instruction type");
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// We need constant scalar or constant splat shifts.
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const APInt *SecondShiftConst;
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if (!match(SecondShift->getOperand(1), m_APInt(SecondShiftConst)))
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const APInt *InnerShiftConst;
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if (!match(InnerShift->getOperand(1), m_APInt(InnerShiftConst)))
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return false;
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unsigned SecondShiftAmt = SecondShiftConst->getZExtValue();
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bool IsSecondShiftLeft = SecondShift->getOpcode() == Instruction::Shl;
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// We can always fold shl(c1) + shl(c2) -> shl(c1+c2).
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// We can always fold lshr(c1) + lshr(c2) -> lshr(c1+c2).
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if (IsFirstShiftLeft == IsSecondShiftLeft)
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// Two logical shifts in the same direction:
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// shl (shl X, C1), C2 --> shl X, C1 + C2
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// lshr (lshr X, C1), C2 --> lshr X, C1 + C2
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bool IsInnerShl = InnerShift->getOpcode() == Instruction::Shl;
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if (IsInnerShl == IsOuterShl)
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return true;
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// We can always fold lshr(c) + shl(c) -> and(c2).
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// We can always fold shl(c) + lshr(c) -> and(c2).
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if (FirstShiftAmt == SecondShiftAmt)
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// Equal shift amounts in opposite directions become bitwise 'and':
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// lshr (shl X, C), C --> and X, C'
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// shl (lshr X, C), C --> and X, C'
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unsigned InnerShAmt = InnerShiftConst->getZExtValue();
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if (InnerShAmt == OuterShAmt)
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return true;
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unsigned TypeWidth = SecondShift->getType()->getScalarSizeInBits();
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// If the 2nd shift is bigger than the 1st, we can fold:
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// lshr(c1) + shl(c2) -> shl(c3) + and(c4) or
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// shl(c1) + lshr(c2) -> lshr(c3) + and(c4),
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// lshr (shl X, C1), C2 --> and (shl X, C1 - C2), C3
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// shl (lshr X, C1), C2 --> and (lshr X, C1 - C2), C3
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// but it isn't profitable unless we know the and'd out bits are already zero.
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// Also check that the 2nd shift is valid (less than the type width) or we'll
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// crash trying to produce the bit mask for the 'and'.
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if (SecondShiftAmt > FirstShiftAmt && SecondShiftAmt < TypeWidth) {
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unsigned MaskShift = IsSecondShiftLeft ? TypeWidth - SecondShiftAmt
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: SecondShiftAmt - FirstShiftAmt;
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APInt Mask = APInt::getLowBitsSet(TypeWidth, FirstShiftAmt) << MaskShift;
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if (IC.MaskedValueIsZero(SecondShift->getOperand(0), Mask, 0, CxtI))
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// Also, check that the inner shift is valid (less than the type width) or
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// we'll crash trying to produce the bit mask for the 'and'.
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unsigned TypeWidth = InnerShift->getType()->getScalarSizeInBits();
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if (InnerShAmt > OuterShAmt && InnerShAmt < TypeWidth) {
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unsigned MaskShift =
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IsInnerShl ? TypeWidth - InnerShAmt : InnerShAmt - OuterShAmt;
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APInt Mask = APInt::getLowBitsSet(TypeWidth, OuterShAmt) << MaskShift;
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if (IC.MaskedValueIsZero(InnerShift->getOperand(0), Mask, 0, CxtI))
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return true;
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}
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