diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index 3c25708a9f5..0bc984db49b 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -75,15 +75,15 @@ and enhancements, described below.
-This release includes new native code generators for Alpha, IA-64, and SPARC-V8 (32-bit -SPARC). These code generators are still beta quality, but are progressing -rapidly. +href="#alpha-be">Alpha, IA-64, and SPARC-V8 (32-bit SPARC). These code generators are still +beta quality, but are progressing rapidly.
+fastcc int %bar(int %X, int(double, int)* %FP) { ; fastcc %Y = tail call fastcc int %FP(double 0.0, int %X) ; tail, fastcc ret int %Y } -+
In LLVM 1.5, the X86 code generator is the only target that has been enhanced to support proper tail calls (other targets will be enhanced in future). @@ -167,7 +167,7 @@ disabled by default. Pass -enable-x86-fastcc to llc to enable it (this will be enabled by default in the next release). The example above compiles to:
-+bar: sub ESP, 8 # Callee uses more space than the caller mov ECX, DWORD PTR [ESP + 8] # Get the old return address @@ -175,7 +175,7 @@ will be enabled by default in the next release). The example above compiles to: mov DWORD PTR [ESP + 8], 0 # Second half of 0.0 mov DWORD PTR [ESP], ECX # Put the return address where it belongs jmp EDX # Tail call "FP" -+
With fastcc on X86, the first two integer arguments are passed in EAX/EDX, the @@ -728,6 +728,23 @@ particularly for C++ and floating-point programs.