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[MachineVerifier] Relax checkLivenessAtDef regarding dead subreg defs
Summary: Consider an instruction that has multiple defs of the same vreg, but defining different subregs: %7.sub1:rc, dead %7.sub2:rc = inst Calling checkLivenessAtDef for the live interval associated with %7 incorrectly reported "live range continues after a dead def". The live range for %7 has a dead def at the slot index for "inst" even if the live range continues (given that there are later uses of %7.sub1). This patch adjusts MachineVerifier::checkLivenessAtDef to allow dead subregister definitions, unless we are checking a subrange (when tracking subregister liveness). A limitation is that we do not detect the situation when the live range continues past an instruction that defines the full virtual register by multiple dead subreg defines. I also removed some dead code related to physical register in checkLivenessAtDef. Wwe only call that method for virtual registers, so I added an assertion instead. Reviewers: kparzysz Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52237 llvm-svn: 342618
This commit is contained in:
Bjorn Pettersson
parent
005b3bfebc
commit
463634ad4b
@ -262,6 +262,7 @@ namespace {
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LaneBitmask LaneMask = LaneBitmask::getNone());
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void checkLivenessAtDef(const MachineOperand *MO, unsigned MONum,
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SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit,
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bool SubRangeCheck = false,
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LaneBitmask LaneMask = LaneBitmask::getNone());
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void markReachable(const MachineBasicBlock *MBB);
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@ -1396,7 +1397,7 @@ void MachineVerifier::checkLivenessAtUse(const MachineOperand *MO,
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void MachineVerifier::checkLivenessAtDef(const MachineOperand *MO,
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unsigned MONum, SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit,
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LaneBitmask LaneMask) {
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bool SubRangeCheck, LaneBitmask LaneMask) {
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if (const VNInfo *VNI = LR.getVNInfoAt(DefIdx)) {
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assert(VNI && "NULL valno is not allowed");
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if (VNI->def != DefIdx) {
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@ -1420,25 +1421,14 @@ void MachineVerifier::checkLivenessAtDef(const MachineOperand *MO,
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if (MO->isDead()) {
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LiveQueryResult LRQ = LR.Query(DefIdx);
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if (!LRQ.isDeadDef()) {
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// In case of physregs we can have a non-dead definition on another
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// operand.
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bool otherDef = false;
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if (!TargetRegisterInfo::isVirtualRegister(VRegOrUnit)) {
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const MachineInstr &MI = *MO->getParent();
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for (const MachineOperand &MO : MI.operands()) {
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if (!MO.isReg() || !MO.isDef() || MO.isDead())
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continue;
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unsigned Reg = MO.getReg();
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for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
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if (*Units == VRegOrUnit) {
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otherDef = true;
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break;
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}
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}
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}
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}
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if (!otherDef) {
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assert(TargetRegisterInfo::isVirtualRegister(VRegOrUnit) &&
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"Expecting a virtual register.");
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// A dead subreg def only tells us that the specific subreg is dead. There
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// could be other non-dead defs of other subregs, or we could have other
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// parts of the register being live through the instruction. So unless we
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// are checking liveness for a subrange it is ok for the live range to
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// continue, given that we have a dead def of a subregister.
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if (SubRangeCheck || MO->getSubReg() == 0) {
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report("Live range continues after dead def flag", MO, MONum);
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report_context_liverange(LR);
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report_context_vreg_regunit(VRegOrUnit);
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@ -1596,7 +1586,7 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
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for (const LiveInterval::SubRange &SR : LI.subranges()) {
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if ((SR.LaneMask & MOMask).none())
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continue;
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checkLivenessAtDef(MO, MONum, DefIdx, SR, Reg, SR.LaneMask);
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checkLivenessAtDef(MO, MONum, DefIdx, SR, Reg, true, SR.LaneMask);
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}
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}
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} else {
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74
test/CodeGen/Hexagon/verify-liveness-at-def.mir
Normal file
74
test/CodeGen/Hexagon/verify-liveness-at-def.mir
Normal file
@ -0,0 +1,74 @@
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# Using a trick to run simple-register-coalescing twice, that way
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# liveintervals should be preserved while running the machine verifier.
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#
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# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s
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# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s
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---
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name: test_pass
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tracksRegLiveness: true
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body: |
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bb.0:
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A2_nop implicit-def %0:doubleregs
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A2_nop implicit-def dead %0.isub_lo, implicit-def %0.isub_hi, implicit %0
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A2_nop implicit %0.isub_hi
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...
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---
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name: test_fail
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tracksRegLiveness: true
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body: |
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bb.0:
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A2_nop implicit-def %0:doubleregs
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A2_nop implicit-def dead %0.isub_lo, implicit-def %0.isub_hi, implicit %0
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A2_nop implicit %0.isub_lo
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A2_nop implicit-def %1:doubleregs
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A2_nop implicit-def dead %1.isub_lo, implicit-def dead %1.isub_hi, implicit %1
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A2_nop implicit %1
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A2_nop implicit-def dead %2:doubleregs
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A2_nop implicit %2
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...
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###############################################################################
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# We are expecting four "Bad machine code" when subregister liveness is used.
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#
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# CHECK-SUB-NOT: Bad machine code
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#
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# CHECK-SUB: Bad machine code: Live range continues after dead def flag
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# CHECK_SUB-NEXT: function: test_fail
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# CHECK-SUB: v. register: %0
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# CHECK-SUB: lanemask: 00000002
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#
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# CHECK-SUB-NOT: Bad machine code
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#
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# CHECK-SUB: Bad machine code: Live range continues after dead def flag
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# CHECK-SUB-NEXT: function: test_fail
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# CHECK-SUB: v. register: %1
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# CHECK-SUB: lanemask: 00000002
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#
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# CHECK-SUB-NOT: Bad machine code
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#
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# CHECK-SUB: Bad machine code: Live range continues after dead def flag
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# CHECK-SUB-NEXT: function: test_fail
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# CHECK-SUB: v. register: %1
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# CHECK-SUB: lanemask: 00000001
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#
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# CHECK-SUB: Bad machine code: Live range continues after dead def flag
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# CHECK-SUB-NEXT: function: test_fail
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# CHECK: v. register: %2
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#
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# CHECK-SUB-NOT: Bad machine code
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###############################################################################
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# Without subregister liveness we only detect one of the failing scenarios.
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#
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# CHECK-NOSUB-NOT: Bad machine code
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#
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# CHECK-NOSUB: Bad machine code: Live range continues after dead def flag
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# CHECK-NOSUB-NEXT: function: test_fail
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# CHECK: v. register: %2
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#
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# CHECK-NOSUB-NOT: Bad machine code
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