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Fix a bug in the A57FPLoadBalancing register tracking/scavenger.

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The code in AArch64A57FPLoadBalancing::scavengeRegister() to handle dead defs
was not correctly handling aliased registers.  E.g. if the dead def was of D2,
then S2 was not being marked as unavailable, so it could potentially be used
across a live-range in which it would be clobbered.

Patch by Geoff Berry <gberry@codeaurora.org>!
Phabricator: http://reviews.llvm.org/D10900

llvm-svn: 241449
This commit is contained in:
Chad Rosier 2015-07-06 14:46:34 +00:00
parent 2c1a53aa22
commit 46c71906bc
1 changed files with 11 additions and 3 deletions
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14
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
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@ -510,9 +510,17 @@ int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C,
if (J.isRegMask())
AvailableRegs.clearBitsNotInMask(J.getRegMask());
if (J.isReg() && J.isDef() && AvailableRegs[J.getReg()]) {
assert(J.isDead() && "Non-dead def should have been removed by now!");
AvailableRegs.reset(J.getReg());
if (J.isReg() && J.isDef()) {
MCRegAliasIterator AI(J.getReg(), TRI, /*IncludeSelf=*/true);
if (J.isDead())
for (; AI.isValid(); ++AI)
AvailableRegs.reset(*AI);
#ifndef NDEBUG
else
for (; AI.isValid(); ++AI)
assert(!AvailableRegs[*AI] &&
"Non-dead def should have been removed by now!");
#endif
}
}
}