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[PowerPC] [FPEnv] Disable strict FP mutation by default

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22a0edd0 introduced a config IsStrictFPEnabled, which controls the
strict floating point mutation (transforming some strict-fp operations
into non-strict in ISel). This patch disables the mutation by default
since we've finished PowerPC strict-fp enablement in backend.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87222
This commit is contained in:
Qiu Chaofan 2020-09-10 13:28:09 +08:00
parent 04bcaa46b7
commit 46f4691cfe
3 changed files with 7 additions and 5 deletions
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2
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -1320,6 +1320,8 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
MaxLoadsPerMemcmpOptSize = 4;
}
IsStrictFPEnabled = true;
// Let the subtarget (CPU) decide if a predictable select is more expensive
// than the corresponding branch. This information is used in CGP to decide
// when to convert selects into branches.

2
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -3477,7 +3477,7 @@ def : Pat<(f64 (extloadf32 iaddr:$src)),
def : Pat<(f64 (extloadf32 xaddr:$src)),
(COPY_TO_REGCLASS (LFSX xaddr:$src), F8RC)>;
def : Pat<(f64 (fpextend f32:$src)),
def : Pat<(f64 (any_fpextend f32:$src)),
(COPY_TO_REGCLASS $src, F8RC)>;
}

8
test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
View File

@ -7168,19 +7168,19 @@ define <3 x double> @constrained_vector_fpext_v3f32() #0 {
; PC64LE-NEXT: addis 3, 2, .LCPI133_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI133_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI133_2@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI133_0@toc@l(3)
; PC64LE-NEXT: lfs 3, .LCPI133_0@toc@l(3)
; PC64LE-NEXT: lfs 2, .LCPI133_1@toc@l(4)
; PC64LE-NEXT: lfs 3, .LCPI133_2@toc@l(5)
; PC64LE-NEXT: lfs 1, .LCPI133_2@toc@l(5)
; PC64LE-NEXT: blr
;
; PC64LE9-LABEL: constrained_vector_fpext_v3f32:
; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI133_0@toc@ha
; PC64LE9-NEXT: lfs 1, .LCPI133_0@toc@l(3)
; PC64LE9-NEXT: lfs 3, .LCPI133_0@toc@l(3)
; PC64LE9-NEXT: addis 3, 2, .LCPI133_1@toc@ha
; PC64LE9-NEXT: lfs 2, .LCPI133_1@toc@l(3)
; PC64LE9-NEXT: addis 3, 2, .LCPI133_2@toc@ha
; PC64LE9-NEXT: lfs 3, .LCPI133_2@toc@l(3)
; PC64LE9-NEXT: lfs 1, .LCPI133_2@toc@l(3)
; PC64LE9-NEXT: blr
entry:
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(