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Revert r68073. It's causing a failure in the Apple-style builds.
llvm-svn: 68092
This commit is contained in:
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95a32aa18b
commit
4706abded2
@ -253,15 +253,6 @@ public:
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/// it returns end()
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/// it returns end()
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iterator getFirstTerminator();
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iterator getFirstTerminator();
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/// isOnlyReachableViaFallthough - Return true if this basic block has
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/// exactly one predecessor and the control transfer mechanism between
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/// the predecessor and this block is a fall-through.
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bool isOnlyReachableByFallthrough() const {
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return !pred_empty() &&
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next(pred_begin()) == pred_end() &&
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(*pred_begin())->getFirstTerminator() == (*pred_begin())->end();
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}
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void pop_front() { Insts.pop_front(); }
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void pop_front() { Insts.pop_front(); }
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void pop_back() { Insts.pop_back(); }
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void pop_back() { Insts.pop_back(); }
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void push_back(MachineInstr *MI) { Insts.push_back(MI); }
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void push_back(MachineInstr *MI) { Insts.push_back(MI); }
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@ -578,6 +578,20 @@ bool LocalSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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DOUT << "**** Post Machine Instrs ****\n";
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DOUT << "**** Post Machine Instrs ****\n";
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DEBUG(MF.dump());
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DEBUG(MF.dump());
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// See if any of the spills we added are actually dead and can be deleted.
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for (std::vector<MachineInstr*> >::iterator
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I = AddedSpills.begin(), E = AddedSpills.end(); I != E; ++I) {
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MachineInstr *MI = *I;
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if (VRM.OnlyUseOfStackSlot(MI)) {
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MachineBasicBlock *MBB = MI->getParent();
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DOUT << "Removed dead store:\t" << *MI;
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VRM.RemoveMachineInstrFromMaps(MI);
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MBB->erase(MI);
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++NumDSE;
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}
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}
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// Mark unused spill slots.
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// Mark unused spill slots.
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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int SS = VRM.getLowSpillSlot();
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int SS = VRM.getLowSpillSlot();
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@ -588,6 +602,7 @@ bool LocalSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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++NumDSS;
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++NumDSS;
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}
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}
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AddedSpills.clear();
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return true;
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return true;
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}
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}
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@ -798,9 +813,50 @@ bool LocalSpiller::CommuteToFoldReload(MachineBasicBlock &MBB,
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return false;
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return false;
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}
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}
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void LocalSpiller::RemoveDeadStore(MachineInstr *Store,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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SmallSet<MachineInstr*, 4> &ReMatDefs,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM) {
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// If there is a dead store to this stack slot, nuke it now.
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DOUT << "Removed dead store:\t" << *Store;
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++NumDSE;
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SmallVector<unsigned, 2> KillRegs;
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InvalidateKills(*Store, RegKills, KillOps, &KillRegs);
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MachineBasicBlock::iterator PrevMII = Store;
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bool CheckDef = PrevMII != MBB.begin();
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if (CheckDef) --PrevMII;
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VRM.RemoveMachineInstrFromMaps(Store);
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MBB.erase(Store);
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if (CheckDef) {
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// Look at defs of killed registers on the store. Mark the defs as dead
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// since the store has been deleted and they aren't being reused.
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for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
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bool HasOtherDef = false;
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if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
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MachineInstr *DeadDef = PrevMII;
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if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
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// FIXME: This assumes a remat def does not have side effects.
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VRM.RemoveMachineInstrFromMaps(DeadDef);
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MBB.erase(DeadDef);
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++NumDRM;
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}
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}
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}
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}
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}
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/// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
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/// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
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/// the last store to the same slot is now dead. If so, remove the last store.
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/// the last store to the same slot is now dead. If so, remove the last store.
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void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
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void
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LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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MachineBasicBlock::iterator &MII,
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int Idx, unsigned PhysReg, int StackSlot,
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int Idx, unsigned PhysReg, int StackSlot,
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const TargetRegisterClass *RC,
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const TargetRegisterClass *RC,
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@ -816,36 +872,8 @@ void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
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DOUT << "Store:\t" << *StoreMI;
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DOUT << "Store:\t" << *StoreMI;
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// If there is a dead store to this stack slot, nuke it now.
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// If there is a dead store to this stack slot, nuke it now.
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if (LastStore) {
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if (LastStore)
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DOUT << "Removed dead store:\t" << *LastStore;
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RemoveDeadStore(LastStore, MBB, MII, ReMatDefs, RegKills, KillOps, VRM);
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++NumDSE;
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SmallVector<unsigned, 2> KillRegs;
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InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
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MachineBasicBlock::iterator PrevMII = LastStore;
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bool CheckDef = PrevMII != MBB.begin();
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if (CheckDef)
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--PrevMII;
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VRM.RemoveMachineInstrFromMaps(LastStore);
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MBB.erase(LastStore);
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if (CheckDef) {
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// Look at defs of killed registers on the store. Mark the defs
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// as dead since the store has been deleted and they aren't
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// being reused.
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for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
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bool HasOtherDef = false;
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if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
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MachineInstr *DeadDef = PrevMII;
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if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
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// FIXME: This assumes a remat def does not have side
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// effects.
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VRM.RemoveMachineInstrFromMaps(DeadDef);
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MBB.erase(DeadDef);
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++NumDRM;
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}
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}
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}
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}
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}
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LastStore = next(MII);
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LastStore = next(MII);
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@ -1060,6 +1088,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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if (VRM.isSpillPt(&MI)) {
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if (VRM.isSpillPt(&MI)) {
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std::vector<std::pair<unsigned,bool> > &SpillRegs =
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std::vector<std::pair<unsigned,bool> > &SpillRegs =
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VRM.getSpillPtSpills(&MI);
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VRM.getSpillPtSpills(&MI);
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for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
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for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
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unsigned VirtReg = SpillRegs[i].first;
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unsigned VirtReg = SpillRegs[i].first;
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bool isKill = SpillRegs[i].second;
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bool isKill = SpillRegs[i].second;
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@ -1073,7 +1102,9 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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VRM.addSpillSlotUse(StackSlot, StoreMI);
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VRM.addSpillSlotUse(StackSlot, StoreMI);
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DOUT << "Store:\t" << *StoreMI;
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DOUT << "Store:\t" << *StoreMI;
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VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod);
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VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod);
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AddedSpills.push_back(StoreMI);
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}
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}
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NextMII = next(MII);
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NextMII = next(MII);
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}
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}
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@ -285,6 +285,7 @@ namespace llvm {
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const TargetRegisterInfo *TRI;
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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const TargetInstrInfo *TII;
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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std::vector<MachineInstr*> AddedSpills;
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public:
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public:
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bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM);
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bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM);
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private:
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private:
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@ -305,6 +306,14 @@ namespace llvm {
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std::vector<MachineOperand*> &KillOps,
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std::vector<MachineOperand*> &KillOps,
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const TargetRegisterInfo *TRI,
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const TargetRegisterInfo *TRI,
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VirtRegMap &VRM);
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VirtRegMap &VRM);
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void RemoveDeadStore(MachineInstr *Store,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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SmallSet<MachineInstr*, 4> &ReMatDefs,
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BitVector &RegKills,
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std::vector<MachineOperand*> &KillOps,
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VirtRegMap &VRM);
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void SpillRegToStackSlot(MachineBasicBlock &MBB,
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void SpillRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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MachineBasicBlock::iterator &MII,
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int Idx, unsigned PhysReg, int StackSlot,
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int Idx, unsigned PhysReg, int StackSlot,
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@ -188,7 +188,7 @@ void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
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if (MF->getFrameInfo()->isFixedObjectIndex(FI))
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if (MF->getFrameInfo()->isFixedObjectIndex(FI))
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continue;
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continue;
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// This stack reference was produced by instruction selection and
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// This stack reference was produced by instruction selection and
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// is not a spill
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// is not a spill.
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if (FI < LowSpillSlot)
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if (FI < LowSpillSlot)
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continue;
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continue;
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assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
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assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
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@ -201,6 +201,27 @@ void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
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EmergencySpillMap.erase(MI);
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EmergencySpillMap.erase(MI);
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}
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}
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bool VirtRegMap::OnlyUseOfStackSlot(const MachineInstr *MI) const {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isFI())
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continue;
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int FI = MO.getIndex();
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if (MF->getFrameInfo()->isFixedObjectIndex(FI))
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continue;
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// This stack reference was produced by instruction selection and
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// is not a spill.
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if (FI < LowSpillSlot)
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continue;
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assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
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&& "Invalid spill slot");
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if (SpillSlotToUsesMap[FI - LowSpillSlot].size() != 1)
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return false;
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}
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return true;
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}
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void VirtRegMap::print(std::ostream &OS, const Module* M) const {
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void VirtRegMap::print(std::ostream &OS, const Module* M) const {
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const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
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const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
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@ -430,6 +430,8 @@ namespace llvm {
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/// the folded instruction map and spill point map.
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/// the folded instruction map and spill point map.
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void RemoveMachineInstrFromMaps(MachineInstr *MI);
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void RemoveMachineInstrFromMaps(MachineInstr *MI);
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bool OnlyUseOfStackSlot(const MachineInstr *MI) const;
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void print(std::ostream &OS, const Module* M = 0) const;
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void print(std::ostream &OS, const Module* M = 0) const;
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void print(std::ostream *OS) const { if (OS) print(*OS); }
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void print(std::ostream *OS) const { if (OS) print(*OS); }
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void dump() const;
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void dump() const;
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@ -238,12 +238,7 @@ bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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I != E; ++I) {
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// Print a label for the basic block.
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// Print a label for the basic block.
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if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) {
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if (!I->pred_empty()) {
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// This is an entry block or a block that's only reachable via a
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// fallthrough edge. In non-VerboseAsm mode, don't print the label.
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assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) &&
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"Fall-through predecessor not adjacent to its successor!");
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} else {
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printBasicBlockLabel(I, true, true, VerboseAsm);
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printBasicBlockLabel(I, true, true, VerboseAsm);
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O << '\n';
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O << '\n';
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}
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}
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