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[SPARC] Add support for llvm.thread.pointer.
Differential Revision: http://reviews.llvm.org/D19387 llvm-svn: 267544
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@ -1799,6 +1799,8 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM,
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}
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}
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setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
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setMinFunctionAlignment(2);
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computeRegisterProperties(Subtarget->getRegisterInfo());
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@ -2960,6 +2962,19 @@ static SDValue LowerATOMIC_LOAD_STORE(SDValue Op, SelectionDAG &DAG) {
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return Op;
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}
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SDValue SparcTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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SelectionDAG &DAG) const {
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unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
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SDLoc dl(Op);
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switch (IntNo) {
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default: return SDValue(); // Don't custom lower most intrinsics.
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case Intrinsic::thread_pointer: {
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EVT PtrVT = getPointerTy(DAG.getDataLayout());
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return DAG.getRegister(SP::G7, PtrVT);
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}
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}
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}
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SDValue SparcTargetLowering::
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LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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@ -3018,6 +3033,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::SMULO: return LowerUMULO_SMULO(Op, DAG, *this);
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case ISD::ATOMIC_LOAD:
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case ISD::ATOMIC_STORE: return LowerATOMIC_LOAD_STORE(Op, DAG);
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case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
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}
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}
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@ -174,6 +174,8 @@ namespace llvm {
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SDLoc DL,
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SelectionDAG &DAG) const;
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SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
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bool ShouldShrinkFPConstant(EVT VT) const override {
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// Do not shrink FP constpool if VT == MVT::f128.
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// (ldd, call _Q_fdtoq) is more expensive than two ldds.
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11
test/CodeGen/SPARC/thread-pointer.ll
Normal file
11
test/CodeGen/SPARC/thread-pointer.ll
Normal file
@ -0,0 +1,11 @@
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; RUN: llc < %s -mtriple=sparc-unknown-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=sparc64-unknown-linux-gnu | FileCheck %s
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; Function Attrs: nounwind readnone
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declare i8* @llvm.thread.pointer() #1
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define i8* @thread_pointer() {
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; CHECK: mov %g7, %o0
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%1 = tail call i8* @llvm.thread.pointer()
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ret i8* %1
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}
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