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Add ".w" suffix for wide thumb-2 instructions.
llvm-svn: 77199
This commit is contained in:
parent
062cc18e39
commit
471e9f5b8d
@ -153,11 +153,11 @@ multiclass T2I_un_irs<string opc, PatFrag opnode, bit Cheap = 0, bit ReMat = 0>{
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}
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// register
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def r : T2I<(outs GPR:$dst), (ins GPR:$src),
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opc, " $dst, $src",
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opc, ".w $dst, $src",
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[(set GPR:$dst, (opnode GPR:$src))]>;
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// shifted register
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def s : T2I<(outs GPR:$dst), (ins t2_so_reg:$src),
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opc, " $dst, $src",
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opc, ".w $dst, $src",
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[(set GPR:$dst, (opnode t2_so_reg:$src))]>;
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}
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@ -171,13 +171,13 @@ multiclass T2I_bin_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>;
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// register
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def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]> {
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let isCommutable = Commutable;
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}
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// shifted register
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def rs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>;
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}
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@ -187,7 +187,7 @@ multiclass T2I_bin_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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multiclass T2I_rbin_is<string opc, PatFrag opnode> {
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// shifted imm
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def ri : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_imm:$lhs),
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opc, " $dst, $rhs, $lhs",
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opc, ".w $dst, $rhs, $lhs",
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[(set GPR:$dst, (opnode t2_so_imm:$lhs, GPR:$rhs))]>;
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// shifted register
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def rs : T2I<(outs GPR:$dst), (ins GPR:$rhs, t2_so_reg:$lhs),
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@ -201,17 +201,17 @@ let Defs = [CPSR] in {
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multiclass T2I_bin_s_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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// shifted imm
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def ri : T2I<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs),
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!strconcat(opc, "s"), " $dst, $lhs, $rhs",
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!strconcat(opc, "s"), ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>;
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// register
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def rr : T2I<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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!strconcat(opc, "s"), " $dst, $lhs, $rhs",
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!strconcat(opc, "s"), ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]> {
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let isCommutable = Commutable;
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}
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// shifted register
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def rs : T2I<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
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!strconcat(opc, "s"), " $dst, $lhs, $rhs",
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!strconcat(opc, "s"), ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>;
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}
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}
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@ -221,7 +221,7 @@ multiclass T2I_bin_s_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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multiclass T2I_bin_ii12rs<string opc, PatFrag opnode, bit Commutable = 0> {
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// shifted imm
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def ri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>;
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// 12-bit imm
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def ri12 : T2sI<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs),
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@ -229,13 +229,13 @@ multiclass T2I_bin_ii12rs<string opc, PatFrag opnode, bit Commutable = 0> {
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[(set GPR:$dst, (opnode GPR:$lhs, imm0_4095:$rhs))]>;
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// register
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def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]> {
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let isCommutable = Commutable;
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}
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// shifted register
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def rs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>;
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}
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@ -251,14 +251,14 @@ multiclass T2I_adde_sube_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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Requires<[IsThumb2, CarryDefIsUnused]>;
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// register
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def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUnused]> {
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let isCommutable = Commutable;
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}
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// shifted register
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def rs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUnused]>;
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// Carry setting variants
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@ -271,7 +271,7 @@ multiclass T2I_adde_sube_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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}
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// register
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def Srr : T2XI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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!strconcat(opc, "s $dst, $lhs, $rhs"),
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!strconcat(opc, "s.w $dst, $lhs, $rhs"),
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUsed]> {
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let Defs = [CPSR];
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@ -279,7 +279,7 @@ multiclass T2I_adde_sube_irs<string opc, PatFrag opnode, bit Commutable = 0> {
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}
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// shifted register
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def Srs : T2XI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs),
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!strconcat(opc, "s $dst, $lhs, $rhs"),
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!strconcat(opc, "s.w $dst, $lhs, $rhs"),
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUsed]> {
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let Defs = [CPSR];
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@ -319,14 +319,12 @@ multiclass T2I_rsc_is<string opc, PatFrag opnode> {
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}
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}
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/// T2I_rbin_s_is - Same as T2I_bin_s_irs except the order of operands are
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/// reversed. It doesn't define the 'rr' form since it's handled by its
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/// T2I_bin_s_irs counterpart.
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/// T2I_rbin_s_is - Same as T2I_rbin_is except sets 's' bit.
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let Defs = [CPSR] in {
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multiclass T2I_rbin_s_is<string opc, PatFrag opnode> {
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// shifted imm
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def ri : T2XI<(outs GPR:$dst), (ins GPR:$rhs, t2_so_imm:$lhs, cc_out:$s),
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!strconcat(opc, "${s} $dst, $rhs, $lhs"),
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!strconcat(opc, "${s}.w $dst, $rhs, $lhs"),
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[(set GPR:$dst, (opnode t2_so_imm:$lhs, GPR:$rhs))]>;
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// shifted register
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def rs : T2XI<(outs GPR:$dst), (ins GPR:$rhs, t2_so_reg:$lhs, cc_out:$s),
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@ -340,11 +338,11 @@ multiclass T2I_rbin_s_is<string opc, PatFrag opnode> {
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multiclass T2I_sh_ir<string opc, PatFrag opnode> {
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// 5-bit imm
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def ri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, imm1_31:$rhs))]>;
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// register
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def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
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opc, " $dst, $lhs, $rhs",
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opc, ".w $dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>;
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}
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@ -355,15 +353,15 @@ let Defs = [CPSR] in {
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multiclass T2I_cmp_is<string opc, PatFrag opnode> {
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// shifted imm
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def ri : T2I<(outs), (ins GPR:$lhs, t2_so_imm:$rhs),
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opc, " $lhs, $rhs",
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opc, ".w $lhs, $rhs",
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[(opnode GPR:$lhs, t2_so_imm:$rhs)]>;
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// register
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def rr : T2I<(outs), (ins GPR:$lhs, GPR:$rhs),
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opc, " $lhs, $rhs",
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opc, ".w $lhs, $rhs",
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[(opnode GPR:$lhs, GPR:$rhs)]>;
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// shifted register
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def rs : T2I<(outs), (ins GPR:$lhs, t2_so_reg:$rhs),
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opc, " $lhs, $rhs",
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opc, ".w $lhs, $rhs",
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[(opnode GPR:$lhs, t2_so_reg:$rhs)]>;
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}
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}
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@ -371,29 +369,29 @@ multiclass T2I_cmp_is<string opc, PatFrag opnode> {
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/// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns.
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multiclass T2I_ld<string opc, PatFrag opnode> {
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def i12 : T2Ii12<(outs GPR:$dst), (ins t2addrmode_imm12:$addr),
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opc, " $dst, $addr",
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opc, ".w $dst, $addr",
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[(set GPR:$dst, (opnode t2addrmode_imm12:$addr))]>;
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def i8 : T2Ii8 <(outs GPR:$dst), (ins t2addrmode_imm8:$addr),
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opc, " $dst, $addr",
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[(set GPR:$dst, (opnode t2addrmode_imm8:$addr))]>;
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def s : T2Iso <(outs GPR:$dst), (ins t2addrmode_so_reg:$addr),
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opc, " $dst, $addr",
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opc, ".w $dst, $addr",
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[(set GPR:$dst, (opnode t2addrmode_so_reg:$addr))]>;
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def pci : T2Ipc <(outs GPR:$dst), (ins i32imm:$addr),
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opc, " $dst, $addr",
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opc, ".w $dst, $addr",
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[(set GPR:$dst, (opnode (ARMWrapper tconstpool:$addr)))]>;
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}
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/// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns.
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multiclass T2I_st<string opc, PatFrag opnode> {
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def i12 : T2Ii12<(outs), (ins GPR:$src, t2addrmode_imm12:$addr),
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opc, " $src, $addr",
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opc, ".w $src, $addr",
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[(opnode GPR:$src, t2addrmode_imm12:$addr)]>;
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def i8 : T2Ii8 <(outs), (ins GPR:$src, t2addrmode_imm8:$addr),
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opc, " $src, $addr",
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[(opnode GPR:$src, t2addrmode_imm8:$addr)]>;
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def s : T2Iso <(outs), (ins GPR:$src, t2addrmode_so_reg:$addr),
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opc, " $src, $addr",
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opc, ".w $src, $addr",
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[(opnode GPR:$src, t2addrmode_so_reg:$addr)]>;
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}
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@ -414,10 +412,10 @@ class T2I_picst<string opc, PatFrag opnode> :
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/// register and one whose operand is a register rotated by 8/16/24.
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multiclass T2I_unary_rrot<string opc, PatFrag opnode> {
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def r : T2I<(outs GPR:$dst), (ins GPR:$Src),
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opc, " $dst, $Src",
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opc, ".w $dst, $Src",
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[(set GPR:$dst, (opnode GPR:$Src))]>;
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def r_rot : T2I<(outs GPR:$dst), (ins GPR:$Src, i32imm:$rot),
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opc, " $dst, $Src, ror $rot",
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opc, ".w $dst, $Src, ror $rot",
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[(set GPR:$dst, (opnode (rotr GPR:$Src, rot_imm:$rot)))]>;
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}
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@ -443,22 +441,22 @@ multiclass T2I_bin_rrot<string opc, PatFrag opnode> {
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let isNotDuplicable = 1 in
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def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp),
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"$cp:\n\tadd $dst, $lhs, pc",
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"$cp:\n\tadd.w $dst, $lhs, pc",
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[(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
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// LEApcrel - Load a pc-relative address into a register without offending the
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// assembler.
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def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p),
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"adr$p $dst, #$label", []>;
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"adr$p.w $dst, #$label", []>;
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def t2LEApcrelJT : T2XI<(outs GPR:$dst),
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(ins i32imm:$label, i32imm:$id, pred:$p),
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"adr$p $dst, #${label}_${id:no_hash}", []>;
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"adr$p.w $dst, #${label}_${id:no_hash}", []>;
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// ADD rd, sp, #so_imm
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def t2ADDrSPi : T2XI<(outs GPR:$dst), (ins GPR:$sp, t2_so_imm:$imm),
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"add $dst, $sp, $imm",
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"add.w $dst, $sp, $imm",
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[]>;
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// ADD rd, sp, #imm12
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@ -657,12 +655,12 @@ def t2STRB_POST : T2Iidxldst<(outs GPR:$base_wb),
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let mayLoad = 1 in
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def t2LDM : T2XI<(outs),
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(ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
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"ldm${addr:submode}${p} $addr, $dst1", []>;
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"ldm${addr:submode}${p}.w $addr, $dst1", []>;
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let mayStore = 1 in
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def t2STM : T2XI<(outs),
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(ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
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"stm${addr:submode}${p} $addr, $src1", []>;
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"stm${addr:submode}${p}.w $addr, $src1", []>;
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//===----------------------------------------------------------------------===//
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// Move Instructions.
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@ -670,11 +668,11 @@ def t2STM : T2XI<(outs),
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let neverHasSideEffects = 1 in
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def t2MOVr : T2sI<(outs GPR:$dst), (ins GPR:$src),
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"mov", " $dst, $src", []>;
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"mov", ".w $dst, $src", []>;
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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def t2MOVi : T2sI<(outs GPR:$dst), (ins t2_so_imm:$src),
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"mov", " $dst, $src",
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"mov", ".w $dst, $src",
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[(set GPR:$dst, t2_so_imm:$src)]>;
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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@ -928,11 +926,11 @@ def t2CLZ : T2I<(outs GPR:$dst), (ins GPR:$src),
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[(set GPR:$dst, (ctlz GPR:$src))]>;
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def t2REV : T2I<(outs GPR:$dst), (ins GPR:$src),
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"rev", " $dst, $src",
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"rev", ".w $dst, $src",
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[(set GPR:$dst, (bswap GPR:$src))]>;
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def t2REV16 : T2I<(outs GPR:$dst), (ins GPR:$src),
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"rev16", " $dst, $src",
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"rev16", ".w $dst, $src",
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[(set GPR:$dst,
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(or (and (srl GPR:$src, (i32 8)), 0xFF),
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(or (and (shl GPR:$src, (i32 8)), 0xFF00),
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@ -940,7 +938,7 @@ def t2REV16 : T2I<(outs GPR:$dst), (ins GPR:$src),
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(and (shl GPR:$src, (i32 8)), 0xFF000000)))))]>;
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def t2REVSH : T2I<(outs GPR:$dst), (ins GPR:$src),
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"revsh", " $dst, $src",
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"revsh", ".w $dst, $src",
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[(set GPR:$dst,
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(sext_inreg
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(or (srl (and GPR:$src, 0xFFFF), (i32 8)),
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@ -1077,14 +1075,14 @@ def t2BLXr9 : T2XI<(outs), (ins GPR:$func, variable_ops),
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let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
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let isPredicable = 1 in
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def t2B : T2XI<(outs), (ins brtarget:$target),
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"b $target",
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"b.w $target",
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[(br bb:$target)]>;
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let isNotDuplicable = 1, isIndirectBranch = 1 in
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def t2BR_JT :
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T2JTI<(outs),
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(ins GPR:$base, GPR:$idx, jt2block_operand:$jt, i32imm:$id),
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"add pc, $base, $idx, lsl #2\n$jt",
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"add.w pc, $base, $idx, lsl #2\n$jt",
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[(ARMbr2jt GPR:$base, GPR:$idx, tjumptable:$jt, imm:$id)]>;
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} // isBranch, isTerminator, isBarrier
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@ -1092,7 +1090,7 @@ def t2BR_JT :
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// a two-value operand where a dag node expects two operands. :(
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let isBranch = 1, isTerminator = 1 in
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def t2Bcc : T2I<(outs), (ins brtarget:$target),
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"b", " $target",
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"b", ".w $target",
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[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
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@ -1,6 +1,6 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "subs r" | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "adc r"
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "sbc r" | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "subs\\.w r" | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "adc\\.w r"
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "sbc\\.w r" | count 2
|
||||
|
||||
define i64 @f1(i64 %a, i64 %b) {
|
||||
entry:
|
||||
|
@ -17,7 +17,7 @@ define i32 @test1() {
|
||||
; DYNAMIC: .long L_G$non_lazy_ptr
|
||||
|
||||
; PIC: _test1
|
||||
; PIC: add r0, r0, pc
|
||||
; PIC: add.w r0, r0, pc
|
||||
; PIC: .long L_G$non_lazy_ptr-(LPC0+4)
|
||||
|
||||
; LINUX: test1
|
||||
|
@ -4,7 +4,7 @@
|
||||
define i32 @t1(i32 %v) nounwind readnone {
|
||||
entry:
|
||||
; CHECK: t1:
|
||||
; CHECK: add r0, r0, r0, lsl #3
|
||||
; CHECK: add.w r0, r0, r0, lsl #3
|
||||
%0 = mul i32 %v, 9
|
||||
ret i32 %0
|
||||
}
|
||||
|
@ -8,7 +8,7 @@
|
||||
define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
|
||||
entry:
|
||||
; CHECK: atexit:
|
||||
; CHECK: add r1, r1, pc
|
||||
; CHECK: add.w r1, r1, pc
|
||||
%r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3]
|
||||
%0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1]
|
||||
store void ()* %func, void ()** %0, align 4
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adc\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adc\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1
|
||||
|
||||
define i64 @f1(i64 %a, i64 %b) {
|
||||
%tmp = add i64 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
|
||||
|
||||
; 171 = 0x000000ab
|
||||
define i32 @f1(i32 %a) {
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adds\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adds\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
|
||||
; 171 = 0x000000ab
|
||||
define i64 @f1(i64 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = add i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adds\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adds\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
|
||||
define i64 @f1(i64 %a, i64 %b) {
|
||||
%tmp = add i64 %a, %b
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = and i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = ashr i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#17} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {asr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#17} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = ashr i32 %a, 17
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = xor i32 %b, 4294967295
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i1 @f1(i32 %a, i32 %b) {
|
||||
%nb = sub i32 0, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "cmn " | grep {#187\\|#11141290\\|#3422604288\\|#1114112} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "cmn\\.w " | grep {#187\\|#11141290\\|#3422604288\\|#1114112} | count 4
|
||||
|
||||
; -0x000000bb = 4294967109
|
||||
define i1 @f1(i32 %a) {
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5
|
||||
|
||||
; 0x000000bb = 187
|
||||
define i1 @f1(i32 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i1 @f1(i32 %a, i32 %b) {
|
||||
%tmp = icmp ne i32 %a, %b
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = xor i32 %a, %b
|
||||
|
@ -4,7 +4,7 @@
|
||||
define void @bar(i32 %n.u) {
|
||||
entry:
|
||||
; CHECK: bar:
|
||||
; CHECK: add pc
|
||||
; CHECK: add.w pc
|
||||
; CHECK: b.w LBB1_2
|
||||
|
||||
switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
|
||||
|
@ -1,8 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr r0} | count 7
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldr | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldr
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr\\.w r0} | count 6
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr r0} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldr\\.w | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldr
|
||||
|
||||
define i32 @f1(i32* %v) {
|
||||
entry:
|
||||
|
@ -1,8 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb r0} | count 7
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrb
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb\\.w r0} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb r0} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb\\.w | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldrb
|
||||
|
||||
define i8 @f1(i8* %v) {
|
||||
entry:
|
||||
|
@ -1,8 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh r0} | count 7
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrh
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh\\.w r0} | count 6
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh r0} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov\\.w | grep 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn\\.w
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh\\.w | grep lsl
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr\\.w | not grep ldrh
|
||||
|
||||
define i16 @f1(i16* %v) {
|
||||
entry:
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = shl i32 %a, 5
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsl\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = shl i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*\[0-9\]} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = lshr i32 %a, 13
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {lsr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = lshr i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mov\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mov\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
|
||||
; 171 = 0x000000ab
|
||||
define i32 @f1(i32 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = xor i32 4294967295, %a
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*#0} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#0} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = sub i32 0, %a
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = xor i32 %b, 4294967295
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp2 = or i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2,+v7a | grep {rev\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2,+v7a | grep {rev\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%tmp = tail call i32 @llvm.bswap.i32(i32 %a)
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ror\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*#\[0-9\]*} | grep 22 | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ror\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*#\[0-9\]*} | grep 22 | count 1
|
||||
|
||||
define i32 @f1(i32 %a) {
|
||||
%l8 = shl i32 %a, 10
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ror\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ror\\.w\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%db = sub i32 32, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5
|
||||
|
||||
; 171 = 0x000000ab
|
||||
define i32 @f1(i32 %a) {
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sbc\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sbc\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1
|
||||
|
||||
define i64 @f1(i64 %a, i64 %b) {
|
||||
%tmp = sub i64 %a, %b
|
||||
|
@ -1,9 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32* %v) {
|
||||
store i32 %a, i32* %v
|
||||
|
@ -1,9 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
|
||||
define i8 @f1(i8 %a, i8* %v) {
|
||||
store i8 %a, i8* %v
|
||||
|
@ -1,9 +1,9 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
|
||||
|
||||
define i16 @f1(i16 %a, i16* %v) {
|
||||
store i16 %a, i16* %v
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\[w\]\\?\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
|
||||
|
||||
; 171 = 0x000000ab
|
||||
define i32 @f1(i32 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i32 @f1(i32 %a, i32 %b) {
|
||||
%tmp = sub i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subs\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subs\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
|
||||
|
||||
define i64 @f1(i64 %a, i64 %b) {
|
||||
%tmp = sub i64 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10
|
||||
|
||||
; 0x000000bb = 187
|
||||
define i1 @f1(i32 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i1 @f1(i32 %a, i32 %b) {
|
||||
%tmp = xor i32 %a, %b
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10
|
||||
|
||||
; 0x000000bb = 187
|
||||
define i1 @f1(i32 %a) {
|
||||
|
@ -1,8 +1,8 @@
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
|
||||
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
|
||||
|
||||
define i1 @f1(i32 %a, i32 %b) {
|
||||
%tmp = and i32 %a, %b
|
||||
|
@ -1,7 +1,7 @@
|
||||
; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \
|
||||
; RUN: grep {i(gottpoff)}
|
||||
; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \
|
||||
; RUN: grep {ldr r., \[pc, r.\]}
|
||||
; RUN: grep {ldr.w r., \[pc, r.\]}
|
||||
; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi \
|
||||
; RUN: -relocation-model=pic | grep {__tls_get_addr}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user